This special session addresses the increasingly critical area of hardware security in VLSI. As computing becomes ubiquitous, most systems need to implement various layers of security, all of which rely on the security of the underlying hardware. At the same time, persistent trends in VLSI are producing challenges and opportunities in the design of security mechanisms. Increased levels of integration, performance and power efficiency, allow the implementation of strong security protocols, however challenges arise due to the emergence of side-channel attacks and the ability to insert hardware Trojans that are difficult to detect. But on the other side, imperfections in the manufacturing process and on-chip noise can be leveraged to implement security primitives such as unique IDs and random numbers. The lessons learned from Hardware Security in advanced CMOS also have more general application. Statistical design and variation- and noise-aware methodologies are all current hot topics in VLSI that share themes with hardware security. This special session includes three papers that address quite different aspects of hardware security from three leading teams in the field. Farinaz Koushanfar from Rice University, USA in "Protecting ICs against piracy", describes a variety of techniques and a methodology for protection against counterfeiting and unauthorized re-use of hardware designs. In "Physically Unclonable Functions: Benefit from Process Variations", Ingrid Verbauwhede and Roel Maes from KU Leuven, Belgium, show how variations in the manufacturing process can be used to develop unique and reliable identifiers for integrated circuits. Finally, Christof Paar, Tim Guneysu and Stephan Heyse from Ruhr University, Bochum, Germany, give a glimpse of future applied cryptography in "The Future of High-Speed Cryptography: New Computing Platforms and New Ciphers".