Enabling Energy-Efficient Nonvolatile Computing with Negative Capacitance FET

Xueqing Li, John Sampson, Asif Khan, Kaisheng Ma, Sumitha George, Ahmedullah Aziz, Sumeet Kumar Gupta, Sayeef Salahuddin, Meng Fan Chang, Suman Datta, Vijaykrishnan Narayanan

Research output: Contribution to journalArticlepeer-review

69 Scopus citations


Negative capacitance FETs (NCFETs) have attracted significant interest due to their steep-switching capability at a low voltage and the associated benefits for implementing energy-efficient Boolean logic. While most existing works aim to avoid the I D - V G hysteresis in NCFETs, this paper exploits this hysteresis feature for logic-memory synergy and presents a custom-designed nonvolatile NCFET D flip-flop (DFF) that maintains its state during power outages. This paper also presents an NCFET fabricated for this purpose, showing <10 mV/decade steep hysteresisedges and high, up to seven orders inmagnitude, R DS ratio between the two polarization states. With a device-circuit codesign that takes advantage of the embedded nonvolatility and the high R DS ratio, the proposed DFF consumes negligible static current in backup and restore operations, and remains robust even with significant global and local ferroelectric material variations across a wide 0.3-0.8 V supply voltage range. Therefore, the proposed DFF achieves energy-efficient and low-latency backup and restore operations. Furthermore, it has an ultralow energy-delay overhead, below 2.1% in normal operations, and operates using the same voltage supply as the Boolean logic elements with which it connects. This promises energy-efficient nonvolatile computing in energy-harvesting and power-gating applications.

Original languageEnglish (US)
Article number7959653
Pages (from-to)3452-3458
Number of pages7
JournalIEEE Transactions on Electron Devices
Issue number8
StatePublished - Aug 2017

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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