Energy efficient scheduling scheme for signal processing applications

Vamsi Krishna, N. Ranganathan, Vijaykrishnan Narayanan

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

In this paper, we propose a time constrained energy efficient scheduling technique for signal processing applications. Specifically, we propose a scheduling algorithm, (DFMVS), which utilizes the concept of Dynamic Frequency Clocking and Multiple Voltage Scaling. In the dynamic frequency scheme, all units are driven by a single clock line which changes at run time depending on the functional unit active at that time. This feature of dynamic frequency clocking gives enough slack for multiples voltages to be used for energy minimization. DFMVS has been applied to some DSP benchmarks and the results show an average reduction of 31.6% in energy dissipated as compared to using a uni-frequency clocking scheme with a single supply voltage.

Original languageEnglish (US)
Pages (from-to)1057-1061
Number of pages5
JournalConference Record of the Asilomar Conference on Signals, Systems and Computers
Volume2
StatePublished - 1998

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Signal processing
Scheduling
Electric potential
Scheduling algorithms
Clocks
Voltage scaling

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Signal Processing
  • Electrical and Electronic Engineering

Cite this

@article{daaac9e5efd5490cb7ecb3260c8dbbdb,
title = "Energy efficient scheduling scheme for signal processing applications",
abstract = "In this paper, we propose a time constrained energy efficient scheduling technique for signal processing applications. Specifically, we propose a scheduling algorithm, (DFMVS), which utilizes the concept of Dynamic Frequency Clocking and Multiple Voltage Scaling. In the dynamic frequency scheme, all units are driven by a single clock line which changes at run time depending on the functional unit active at that time. This feature of dynamic frequency clocking gives enough slack for multiples voltages to be used for energy minimization. DFMVS has been applied to some DSP benchmarks and the results show an average reduction of 31.6{\%} in energy dissipated as compared to using a uni-frequency clocking scheme with a single supply voltage.",
author = "Vamsi Krishna and N. Ranganathan and Vijaykrishnan Narayanan",
year = "1998",
language = "English (US)",
volume = "2",
pages = "1057--1061",
journal = "Conference Record of the Asilomar Conference on Signals, Systems and Computers",
issn = "1058-6393",
publisher = "IEEE Computer Society",

}

Energy efficient scheduling scheme for signal processing applications. / Krishna, Vamsi; Ranganathan, N.; Narayanan, Vijaykrishnan.

In: Conference Record of the Asilomar Conference on Signals, Systems and Computers, Vol. 2, 1998, p. 1057-1061.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Energy efficient scheduling scheme for signal processing applications

AU - Krishna, Vamsi

AU - Ranganathan, N.

AU - Narayanan, Vijaykrishnan

PY - 1998

Y1 - 1998

N2 - In this paper, we propose a time constrained energy efficient scheduling technique for signal processing applications. Specifically, we propose a scheduling algorithm, (DFMVS), which utilizes the concept of Dynamic Frequency Clocking and Multiple Voltage Scaling. In the dynamic frequency scheme, all units are driven by a single clock line which changes at run time depending on the functional unit active at that time. This feature of dynamic frequency clocking gives enough slack for multiples voltages to be used for energy minimization. DFMVS has been applied to some DSP benchmarks and the results show an average reduction of 31.6% in energy dissipated as compared to using a uni-frequency clocking scheme with a single supply voltage.

AB - In this paper, we propose a time constrained energy efficient scheduling technique for signal processing applications. Specifically, we propose a scheduling algorithm, (DFMVS), which utilizes the concept of Dynamic Frequency Clocking and Multiple Voltage Scaling. In the dynamic frequency scheme, all units are driven by a single clock line which changes at run time depending on the functional unit active at that time. This feature of dynamic frequency clocking gives enough slack for multiples voltages to be used for energy minimization. DFMVS has been applied to some DSP benchmarks and the results show an average reduction of 31.6% in energy dissipated as compared to using a uni-frequency clocking scheme with a single supply voltage.

UR - http://www.scopus.com/inward/record.url?scp=0032285012&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0032285012&partnerID=8YFLogxK

M3 - Article

VL - 2

SP - 1057

EP - 1061

JO - Conference Record of the Asilomar Conference on Signals, Systems and Computers

JF - Conference Record of the Asilomar Conference on Signals, Systems and Computers

SN - 1058-6393

ER -