Energy efficient scheduling scheme for signal processing applications

Vamsi Krishna, N. Ranganathan, N. Vijaykrishnan

Research output: Contribution to journalConference article

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Abstract

In this paper, we propose a time constrained energy efficient scheduling technique for signal processing applications. Specifically, we propose a scheduling algorithm, (DFMVS), which utilizes the concept of Dynamic Frequency Clocking and Multiple Voltage Scaling. In the dynamic frequency scheme, all units are driven by a single clock line which changes at run time depending on the functional unit active at that time. This feature of dynamic frequency clocking gives enough slack for multiples voltages to be used for energy minimization. DFMVS has been applied to some DSP benchmarks and the results show an average reduction of 31.6% in energy dissipated as compared to using a uni-frequency clocking scheme with a single supply voltage.

Original languageEnglish (US)
Pages (from-to)1057-1061
Number of pages5
JournalConference Record of the Asilomar Conference on Signals, Systems and Computers
Volume2
StatePublished - Dec 1 1998
EventProceedings of the 1998 32nd Asilomar Conference on Signals, Systems & Computers. Part 1 (of 2) - Pacific Grove, CA, USA
Duration: Nov 1 1998Nov 4 1998

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All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Computer Networks and Communications

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