Energy-oriented compiler optimizations for partitioned memory architectures

V. Delaluz, M. Kandemir, N. Vijaykrishnan, M. J. Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

45 Scopus citations

Abstract

Due to low power requirements of many embedded/portable devices such as mobile phones and laptop computers and dramatic increases in clock frequencies of general-purpose processors, low-power software technology is becoming increasingly important in system design. Many applications from image and video processing as well as from dense linear algebra are array-dominated and data-intensive, thereby spending a major portion of their execution time and energy in the memory subsystem. This paper presents a compiler-based optimization framework that targets reducing the energy consumption in a partitioned off-chip memory architecture that contains multiple memory banks by organizing the order of computations and the layout of data. The optimizations considered in this work take advantage of low-power operating modes and the partitioned (multi-bank) structure of the off-chip memory. Our preliminary experiments show that the proposed framework improves memory energy by up to 86% over a scheme that keeps all the memory banks in the active (fully-operational) operating mode all the time, and up to 70% over a scheme that utilizes low-power operating modes without doing any loop and data optimizations.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems
PublisherAssociation for Computing Machinery (ACM)
Pages138-147
Number of pages10
ISBN (Print)1581133383, 9781581133387
DOIs
StatePublished - 2000
EventProceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2000) - San Jose, CA, United States
Duration: Nov 17 2000Nov 18 2000

Publication series

NameProceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems

Other

OtherProceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2000)
CountryUnited States
CitySan Jose, CA
Period11/17/0011/18/00

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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