Estimating influence of data layout optimizations on SDRAM energy consumption

H. S. Kim, N. Vijaykrishnan, M. Kandemir, E. Brockmeyer, F. Catthoor, M. J. Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

An important problem in extracting maximum benefits from an SDRAM-based architecture is to exploit data locality at the page granularity. Frequent switches between data pages can increase memory latency and have an impact on energy consumption. In this paper, we propose a mathematical formulation, using Presburger arithmetic and Ehrhart polynomials to-estimate the number of page breaks statically (i.e., at compile time). The results obtained using video codes indicate that the proposed framework can estimate the number of page breaks with good accuracy.

Original languageEnglish (US)
Title of host publicationISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages40-43
Number of pages4
ISBN (Electronic)158113682X
DOIs
StatePublished - Jan 1 2003
Event2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 - Seoul, Korea, Republic of
Duration: Aug 25 2003Aug 27 2003

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume2003-January
ISSN (Print)1533-4678

Conference

Conference2003 International Symposium on Low Power Electronics and Design, ISLPED 2003
CountryKorea, Republic of
CitySeoul
Period8/25/038/27/03

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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