An important problem in extracting maximum benefits from an SDRAM-based architecture is to exploit data locality at the page granularity. Frequent switches between data pages can increase memory latency and have an impact on energy consumption. In this paper, we propose a mathematical formulation, using Presburger arithmetic and Ehrhart polynomials to estimate the number of page breaks statically (i.e., at compile time). The results obtained using video codes indicate that the proposed framework can estimate the number of page breaks with good accuracy.
|Original language||English (US)|
|Number of pages||4|
|Journal||Proceedings of the International Symposium on Low Power Electronics and Design|
|State||Published - Jan 1 2003|
|Event||Proceedings of the 2003 International Symposium on Low Power Electronics and Design, (ISLPED'03) - Seoul, Korea, Republic of|
Duration: Aug 25 2003 → Aug 27 2003
All Science Journal Classification (ASJC) codes