Abstract
Bank locality can be defined as localizing the number of load/store accesses to a small set of memory banks at a given time. An optimizing compiler can modify a given input code to improve its bank locality. There are several practical advantages of enhancing bank locality, the most important of which is reduced memory energy consumption. Recent trends indicate that energy consumption is fast becoming a first-order design parameter as processor-based systems continue to become more complex and multi-functional. Off-chip memory energy consumption in particular can be a limiting factor in many embedded system designs. This paper presents a novel compiler-based strategy for maximizing the benefits of low-power operating modes available in some recent DRAM-based multi-bank memory systems. In this strategy, the compiler uses linear algebra to represent and optimize bank locality in a mathematical framework. We discuss that exploiting bank locality can be cast as loop (iteration space) and array layout (data space) transformations. We also present experimental data showing the effectiveness of our optimization strategy. Our results show that exploiting bank locality can result in large energy savings.
| Original language | English (US) |
|---|---|
| Title of host publication | CASES 2003 |
| Subtitle of host publication | International Conference on Compilers, Architecture, and Synthesis for Embedded Systems |
| Pages | 287-297 |
| Number of pages | 11 |
| State | Published - Dec 1 2003 |
| Event | CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems - San Jose, CA, United States Duration: Oct 30 2003 → Nov 1 2003 |
Publication series
| Name | CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems |
|---|
Other
| Other | CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems |
|---|---|
| Country | United States |
| City | San Jose, CA |
| Period | 10/30/03 → 11/1/03 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
Cite this
}
Exploiting bank locality in multi-bank memories. / Sezer, U.; Chen, G.; Kandemir, M.; Saputra, H.; Irwin, M. J.
CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. 2003. p. 287-297 (CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Exploiting bank locality in multi-bank memories
AU - Sezer, U.
AU - Chen, G.
AU - Kandemir, M.
AU - Saputra, H.
AU - Irwin, M. J.
PY - 2003/12/1
Y1 - 2003/12/1
N2 - Bank locality can be defined as localizing the number of load/store accesses to a small set of memory banks at a given time. An optimizing compiler can modify a given input code to improve its bank locality. There are several practical advantages of enhancing bank locality, the most important of which is reduced memory energy consumption. Recent trends indicate that energy consumption is fast becoming a first-order design parameter as processor-based systems continue to become more complex and multi-functional. Off-chip memory energy consumption in particular can be a limiting factor in many embedded system designs. This paper presents a novel compiler-based strategy for maximizing the benefits of low-power operating modes available in some recent DRAM-based multi-bank memory systems. In this strategy, the compiler uses linear algebra to represent and optimize bank locality in a mathematical framework. We discuss that exploiting bank locality can be cast as loop (iteration space) and array layout (data space) transformations. We also present experimental data showing the effectiveness of our optimization strategy. Our results show that exploiting bank locality can result in large energy savings.
AB - Bank locality can be defined as localizing the number of load/store accesses to a small set of memory banks at a given time. An optimizing compiler can modify a given input code to improve its bank locality. There are several practical advantages of enhancing bank locality, the most important of which is reduced memory energy consumption. Recent trends indicate that energy consumption is fast becoming a first-order design parameter as processor-based systems continue to become more complex and multi-functional. Off-chip memory energy consumption in particular can be a limiting factor in many embedded system designs. This paper presents a novel compiler-based strategy for maximizing the benefits of low-power operating modes available in some recent DRAM-based multi-bank memory systems. In this strategy, the compiler uses linear algebra to represent and optimize bank locality in a mathematical framework. We discuss that exploiting bank locality can be cast as loop (iteration space) and array layout (data space) transformations. We also present experimental data showing the effectiveness of our optimization strategy. Our results show that exploiting bank locality can result in large energy savings.
UR - http://www.scopus.com/inward/record.url?scp=18844436996&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=18844436996&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:18844436996
SN - 1581136765
SN - 9781581136760
T3 - CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
SP - 287
EP - 297
BT - CASES 2003
ER -