Exploiting heterogeneity for energy efficiency in chip multiprocessors

Vinay Saripalli, Guangyu Sun, Asit Mishra, Yuan Xie, Suman Datta, Vijaykrishnan Narayanan

Research output: Contribution to journalArticlepeer-review

52 Scopus citations

Abstract

Heterogeneous multicores are envisioned to be a promising design paradigm to combat today's challenges of power, memory, and reliability walls that are impeding chip design using deep submicron technology. Future multicores are expected to integrate multiple different cores, including GPGPUs, custom accelerators and configurable cores. In this paper, we introduce an important dimension - technology - using which heterogeneity can be introduced in multicores to improve their energy-performance envelope. Specifically, we analyze the benefits of heterogenous technologies for processor cores and cache subsystems. We discuss two promising device candidates (Tunnel-FET and Magnetic-RAM) for introducing technological diversity in the multicores and analyze their integration in the processor and cache hierarchy in detail. Our analysis shows that introducing such a kind of heterogeneity can significantly enhance the performance and energy behavior of future multicore systems.

Original languageEnglish (US)
Article number5961655
Pages (from-to)109-119
Number of pages11
JournalIEEE Journal on Emerging and Selected Topics in Circuits and Systems
Volume1
Issue number2
DOIs
StatePublished - Jun 1 2011

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Exploiting heterogeneity for energy efficiency in chip multiprocessors'. Together they form a unique fingerprint.

Cite this