Fabrication of axially-doped silicon nanowire tunnel FETs and characterization of tunneling current

Aaron L. Vallett, Sharis Minassian, Suman Datta, Joan Marie Redwing, Theresa S. Mayer

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Recent interest in low-power electronics has sparked considerable interested in gate-controlled tunneling-based transistors (TFETs), which have demonstrated inverse subthreshold slopes (S) better than the MOSFET limit of 60 mV/dec.1 While the natural progression of these devices to nanoscale dimensions promises improved performance23, there is a lack of experimental data regarding the physics of tunneling at reduced dimensions. Here we present a TFET fabricated from an individual axially-doped p +-n-n+ Si nanowire in a device layout that enables the study of tunneling physics as the wire dimensions are scaled to the 1D transport regime.

Original languageEnglish (US)
Title of host publication68th Device Research Conference, DRC 2010
Pages273-274
Number of pages2
DOIs
StatePublished - Oct 11 2010
Event68th Device Research Conference, DRC 2010 - Notre Dame, IN, United States
Duration: Jun 21 2010Jun 23 2010

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770

Other

Other68th Device Research Conference, DRC 2010
CountryUnited States
CityNotre Dame, IN
Period6/21/106/23/10

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Vallett, A. L., Minassian, S., Datta, S., Redwing, J. M., & Mayer, T. S. (2010). Fabrication of axially-doped silicon nanowire tunnel FETs and characterization of tunneling current. In 68th Device Research Conference, DRC 2010 (pp. 273-274). [5551962] (Device Research Conference - Conference Digest, DRC). https://doi.org/10.1109/DRC.2010.5551962