Fault tolerant algorithms for network-on-chip interconnect

M. Pirretti, G. M. Link, R. R. Brooks, Vijaykrishnan Narayanan, Mahmut Kandemir, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

161 Scopus citations

Abstract

As technology scales, fault tolerance is becoming a key concern in on-chip communication. Consequently, this work examines fault tolerant communication algorithms for use in the NoC domain. Two different flooding algorithms and a random walk algorithm are investigated. We show that the flood-based fault tolerant algorithms have an exceedingly high communication overhead. We find that the redundant random walk algorithm offers significantly reduced overhead while maintaining useful levels of fault tolerance. We then compare the implementation costs of these algorithms, both in terms of area as well as in energy consumption, and show that the flooding algorithms consume an order of magnitude more energy per message transmitted.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publicationEmerging Trends in VLSI Systems Design
EditorsA. Smailagic, M. Bayoumi
Pages46-51
Number of pages6
DOIs
StatePublished - Sep 24 2004
EventProceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design - Lafayette, LA, United States
Duration: Feb 19 2004Feb 20 2004

Publication series

NameProceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design

Other

OtherProceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design
CountryUnited States
CityLafayette, LA
Period2/19/042/20/04

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Pirretti, M., Link, G. M., Brooks, R. R., Narayanan, V., Kandemir, M., & Irwin, M. J. (2004). Fault tolerant algorithms for network-on-chip interconnect. In A. Smailagic, & M. Bayoumi (Eds.), Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design (pp. 46-51). (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design). https://doi.org/10.1109/ISVLSI.2004.1339507