Ferroelectric Transistor based Non-Volatile Flip-Flop

Danni Wang, Sumitha George, Ahmedullah Aziz, Suman Datta, Vijaykrishnan Narayanan, Sumeet K. Gupta

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Scopus citations

Abstract

We present a non-volatile flip-flop with a feature to back-up the state in a ferroelectric transistor (FEFET) during power failure or supply gating. The data is stored in the form of polarization of the ferroelectric (FE) layer in the gate stack of the FEFET. The proposed flip-flop utilizes the non-volatility of the three-terminal FEFET to optimize the data backup and restore operations. We perform an extensive device-circuit analysis to provide insights into the design of the proposed flip-flop. We discuss the optimization of the FE thickness in the gate stack of the FEFET to introduce suitable non-volatility and present the implications at the circuit level. Our analysis shows that by virtue of the three terminal structure of the FEFET and the order of magnitude difference in the current for the two polarization states, the design of the backup/restore module is considerably simplified. Compared to a FE capacitor based non-volatile flip-flop, the proposed flip-flop achieves 40% - 50% smaller backup delay, 27% - 40% lower backup energy, comparable restore delay and up to an order of magnitude lower restore energy. While the FE capacitor based design leads to 76% area penalty compared to a conventional (volatile) flip-flop, the proposed design incurs only 35% area overhead.

Original languageEnglish (US)
Title of host publicationISLPED 2016 - Proceedings of the 2016 International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages10-15
Number of pages6
ISBN (Electronic)9781450341851
DOIs
StatePublished - Aug 8 2016
Event21st IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2016 - San Francisco, United States
Duration: Aug 8 2016Aug 10 2016

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other21st IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2016
CountryUnited States
CitySan Francisco
Period8/8/168/10/16

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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