FPGA-based synthesis of FSMs through decomposition

W. L. Yang, R. M. Owens, Mary Jane Irwin

Research output: Contribution to journalConference articlepeer-review

2 Scopus citations

Abstract

In this paper, we present a heuristic to synthesize a finite state machine as a set of smaller interacting submachines based on FPGA technology. This heuristic partitions inputs as well as outputs. Experimental results show that the sizes of submachines are much smaller than the size of original machine. As a result, the distributed smaller submachines can be operated faster than the original machine because of shorter critical paths.

Original languageEnglish (US)
Pages (from-to)97-100
Number of pages4
JournalProceedings of the IEEE Great Lakes Symposium on VLSI
StatePublished - Dec 1 1994
EventProceedings of the 4th Great Lakes Symposium on VLSI - Notre Dame, IN, USA
Duration: Mar 4 1994Mar 5 1994

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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