Fully self-aligned tri-layer a-Si:H thin-film transistors with deposited doped contact layer

Daniel B. Thomasson, Thomas N. Jackson

Research output: Contribution to journalArticle

20 Citations (Scopus)

Abstract

We demonstrate a new self-aligned TFT process for hydrogenated amorphous silicon thin-film transistors (a-Si:H TFT's). Two backside exposure photolithography steps are used to fabricate fully self-aligned tri-layer TFT's with deposited n + contacts. Since no critical data alignment is required, this simple process is well suited to fabrication of short channel TFT's. We have fabricated fully self-aligned tri-layer a-Si:H TFT's with excellent device performance, and contact overlaps <1 μm. For a 20-μm channel length TFT with an a-Si:H thickness of 13 nm, the linear region (V DS = 0.1 V) and saturation region (V DS = 25 V) extrinsic mobility values are both 1.2 cm 2/V-s, the off currents are <1 pA, and the on/off current ratio is >10 7.

Original languageEnglish (US)
Pages (from-to)124-126
Number of pages3
JournalIEEE Electron Device Letters
Volume19
Issue number4
DOIs
StatePublished - Apr 1 1998

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Photolithography
Thin film transistors
Amorphous silicon
Fabrication

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

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Fully self-aligned tri-layer a-Si:H thin-film transistors with deposited doped contact layer. / Thomasson, Daniel B.; Jackson, Thomas N.

In: IEEE Electron Device Letters, Vol. 19, No. 4, 01.04.1998, p. 124-126.

Research output: Contribution to journalArticle

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