Gan mos structures with low interface trap density

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

GaN based electronic devices have gained great success in the arena of high-frequency and high-power applications. A high-quality GaN MOS structure has the potential to enable new device designs and higher device performance, thereby bringing the success of GaN electronics to a new level. This paper discusses results of the work on GaN MOS structures show that with adequate surface preparation samples featuring interface trap density down to the ~ 1010 eV-1cm-2 range can be formed.

Original languageEnglish (US)
Title of host publicationUltra Clean Processing of Semiconductor Surfaces XV - Selected peer-reviewed full text papers from the 15th International Symposium on Ultra Clean Processing of Semiconductor Surfaces, UCPSS 2021
EditorsPaul W. Mertens, Kurt Wostyn, Marc Meuris, Marc Heyns
PublisherTrans Tech Publications Ltd
Pages79-83
Number of pages5
ISBN (Print)9783035738018
DOIs
StatePublished - 2021
Event15th International Symposium on Ultra Clean Processing of Semiconductor Surfaces, UCPSS 2021 - Mechelen, Belgium
Duration: Apr 12 2021Apr 15 2021

Publication series

NameSolid State Phenomena
Volume314 SSP
ISSN (Print)1012-0394
ISSN (Electronic)1662-9779

Conference

Conference15th International Symposium on Ultra Clean Processing of Semiconductor Surfaces, UCPSS 2021
CountryBelgium
CityMechelen
Period4/12/214/15/21

All Science Journal Classification (ASJC) codes

  • Atomic and Molecular Physics, and Optics
  • Materials Science(all)
  • Condensed Matter Physics

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