Future microprocessors are predicted to consist of 10s to 100s of cores running several concurrent tasks. A scalable communication fabric is required to connect these components and thus, giving birth to networks on silicon, also known as Network-on-Chip (NoC). NoCs are being used as the de facto solution for integrating the multicore architectures, as opposed to point-topoint global wiring, shared buses, or monolithic crossbars, because of their scalability and predictable electrical properties.
|Original language||English (US)|
|Title of host publication||Communication Architectures for Systems-on-Chip|
|Number of pages||48|
|State||Published - Jan 1 2011|
All Science Journal Classification (ASJC) codes
- Computer Science(all)