Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing

Deliang Fan, Mrigank Sharad, Abhronil Sengupta, Kaushik Roy

Research output: Contribution to journalArticlepeer-review

26 Scopus citations

Abstract

Hierarchical temporal memory (HTM) tries to mimic the computing in cerebral neocortex. It identifies spatial and temporal patterns in the input for making inferences. This may require a large number of computationally expensive tasks, such as dot product evaluations. Nanodevices that can provide direct mapping for such primitives are of great interest. In this paper, we propose that the computing blocks for HTM can be mapped using low-voltage, magnetometallic spin-neurons combined with an emerging resistive crossbar network, which involves a comprehensive design at algorithm, architecture, circuit, and device levels. Simulation results show the possibility of more than 200× lower energy as compared with a 45-nm CMOS ASIC design.

Original languageEnglish (US)
Article number5962385
Pages (from-to)1907-1919
Number of pages13
JournalIEEE Transactions on Neural Networks and Learning Systems
Volume27
Issue number9
DOIs
StatePublished - Sep 2016

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Science Applications
  • Computer Networks and Communications
  • Artificial Intelligence

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