High temperature bias-stress-induced instability in power trench-gated MOSFETs

J. Hao, M. Rioux, S. A. Suliman, O. O. Awadelkarim

Research output: Contribution to journalArticle

5 Scopus citations

Abstract

We report on the high-temperature reverse-bias (HTRB) stress reliability of trench-gated n-channel metal-oxide-silicon field-effect transistors (n-UMOSFETs). The degradation induced by the HTRB is examined using changes in transistor parameters, optical microscopy, and scanning electron microscopy. The HTRB causes degradations in the threshold voltage and drain leakage of the n-UMOSFET and these degradations are particularly large when the stress is applied in a humid ambient. The observations were interpreted in terms of water molecule diffusion into the gate oxide through passivation cracks in the edge termination of the n-UMOSFET during HTRB in a humid ambient. The water molecules catalyze proton (H+) generation through electric-field assisted interactions and hole injection into the gate oxide at the bottom of the trench. Also, H+ is observed to be very stable in the gate oxide and to migrate between the gate-oxide and oxide-Si interfaces driven by an applied gate-voltage. It is proposed that the employed HTRB configuration and level give rise to negative-bias temperature instability (NBTI) in a parasitic p-channel MOSFET structure occurring in the trench base of the n-UMOSFET, and that NBTI is a serious reliability concern in power UMOSFETs subjected to stress in a moist ambient.

Original languageEnglish (US)
Pages (from-to)374-380
Number of pages7
JournalMicroelectronics Reliability
Volume54
Issue number2
DOIs
StatePublished - Feb 1 2014

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Safety, Risk, Reliability and Quality
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering

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