How Multi-Threshold Designs Can Protect Analog IPs

Abdullah Ash-Saki, Swaroop Ghosh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Analog Integrated Circuits (ICs) are one of the top targets for counterfeiting. However, the security of analog Intellectual Property (IP) is not well investigated as its digital counterpart. In this paper, we explore the possibility of multi-Threshold voltage (VTH) design to protect the analog IP from Reverse Engineering (RE)-based attacks. Analog circuits are sensitive to VTH as the operating region of a transistor can vary with VTH. Furthermore, the VTH of individual transistors cannot be identified during the RE process. The trial-And-error based technique to guess the VTH and validate with a golden IC will ramp up RE effort exponentially. Thus, by carefully including multi-VTH transistors, the designer can ensure that the properties of analog IP e.g., gain, bandwidth, and linearity are protected even though the physical dimensions of the transistors are revealed. We demonstrate this technique by using a case study on a wide-swing cascode amplifier. Simulations show that incorrect VTH inference can lead to substantially degraded performance like 98 dB drop in open-loop gain and up to 19% increase in total harmonic distortion. Based on VTH choice, the proposed technique can save ~ 3% area over conventional design. We show that the reverse engineering effort can be ~1013 years. We propose a technique like transistor splitting to increase the effort even more. Mismatch analysis shows that the proposed technique results in only 1% loss in mean robustness.

Original languageEnglish (US)
Title of host publicationProceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages464-471
Number of pages8
ISBN (Electronic)9781538684771
DOIs
StatePublished - Jan 16 2019
Event36th International Conference on Computer Design, ICCD 2018 - Orlando, United States
Duration: Oct 7 2018Oct 10 2018

Publication series

NameProceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018

Conference

Conference36th International Conference on Computer Design, ICCD 2018
CountryUnited States
CityOrlando
Period10/7/1810/10/18

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All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

Cite this

Ash-Saki, A., & Ghosh, S. (2019). How Multi-Threshold Designs Can Protect Analog IPs. In Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018 (pp. 464-471). [8615725] (Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCD.2018.00075