IMACE: In-Memory Acceleration of Classic McEliece Encoder

Karthikeyan Nagarajan, Sina Sayyah Ensan, Swagata Mandal, Swaroop Ghosh, Anupam Chattopadhyay

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Asymmetric code-based crypto-systems have been developed in the last decade due to rapid evolution of quantum computing that can potentially compromise RSA and ECC based crypto-systems. The McEliece crypto-system based on the general decoding problem is one of the front runner candidates for post-quantum cryptography but the energy-efficiency is limited by the heavy data traffic between the processing elements and the memory. In memory-computing (IMC) architectures can remove the energy-efficiency barriers posed by Von-Neumann computing due to movement of data between the processor and the memory. Emerging non-volatile memories (NVM) such as, Resistive RAM (ReRAM) implemented in a crossbar array are promising substrates to realize IMC due to excellent High Resistance State (HRS) to Low Resistance State (LRS) ratios and high-densities. Therefore, McEliece can be benefited substantially by in-memory acceleration. We propose, iMACE, a high performance and area-efficient hardware implementation of the core encoding function of McEliece by exploiting ReRAM-based IMC. Simulation results show 18.8X-94X better throughput and 46%-97% reduction in energy consumption compared to the FPGA-based implementation.

Original languageEnglish (US)
Title of host publicationProceedings - 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019
PublisherIEEE Computer Society
Pages513-518
Number of pages6
ISBN (Electronic)9781538670996
DOIs
StatePublished - Jul 2019
Event18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019 - Miami, United States
Duration: Jul 15 2019Jul 17 2019

Publication series

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume2019-July
ISSN (Print)2159-3469
ISSN (Electronic)2159-3477

Conference

Conference18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019
CountryUnited States
CityMiami
Period7/15/197/17/19

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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  • Cite this

    Nagarajan, K., Ensan, S. S., Mandal, S., Ghosh, S., & Chattopadhyay, A. (2019). IMACE: In-Memory Acceleration of Classic McEliece Encoder. In Proceedings - 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019 (pp. 513-518). [8839477] (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2019-July). IEEE Computer Society. https://doi.org/10.1109/ISVLSI.2019.00098