TY - JOUR
T1 - Impact of scaling on the effectiveness of dynamic power reduction schemes
AU - Duarte, D.
AU - Vijaykrishnan, N.
AU - Irwin, M. J.
AU - Kim, H. S.
AU - McFarland, G.
PY - 2002/1/1
Y1 - 2002/1/1
N2 - Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, circuit design and micro-architectural changes are required. Consequently, to focus the optimization efforts in the right direction, the models proposed and studies performed in this work are a first step for understanding the relative importance of leakage and dynamic energy in future technologies. Further, we analyze the effectiveness of two energy reduction mechanisms that employ voltage scaling, namely, supply and threshold voltage selection. We consider the impact of imminent technology changes and packaging improvements while showing that neglecting the impact of temperature may lead to underestimate the power savings by up to 19.5%.
AB - Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, circuit design and micro-architectural changes are required. Consequently, to focus the optimization efforts in the right direction, the models proposed and studies performed in this work are a first step for understanding the relative importance of leakage and dynamic energy in future technologies. Further, we analyze the effectiveness of two energy reduction mechanisms that employ voltage scaling, namely, supply and threshold voltage selection. We consider the impact of imminent technology changes and packaging improvements while showing that neglecting the impact of temperature may lead to underestimate the power savings by up to 19.5%.
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U2 - 10.1109/ICCD.2002.1106798
DO - 10.1109/ICCD.2002.1106798
M3 - Article
AN - SCOPUS:0036396948
SP - 382
EP - 387
JO - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
JF - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SN - 1063-6404
M1 - 62
ER -