Impact of scaling on the effectiveness of dynamic power reduction schemes

D. Duarte, Vijaykrishnan Narayanan, Mary Jane Irwin, H. S. Kim, G. McFarland

Research output: Contribution to journalArticle

39 Citations (Scopus)

Abstract

Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, circuit design and micro-architectural changes are required. Consequently, to focus the optimization efforts in the right direction, the models proposed and studies performed in this work are a first step for understanding the relative importance of leakage and dynamic energy in future technologies. Further, we analyze the effectiveness of two energy reduction mechanisms that employ voltage scaling, namely, supply and threshold voltage selection. We consider the impact of imminent technology changes and packaging improvements while showing that neglecting the impact of temperature may lead to underestimate the power savings by up to 19.5%.

Original languageEnglish (US)
Article number62
Pages (from-to)382-387
Number of pages6
JournalProceedings-IEEE International Conference on Computer Design: VLSI in Computers and Processors
DOIs
StatePublished - Jan 1 2002

Fingerprint

Limiters
Threshold voltage
Packaging
Networks (circuits)
Temperature
Voltage scaling

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

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Impact of scaling on the effectiveness of dynamic power reduction schemes. / Duarte, D.; Narayanan, Vijaykrishnan; Irwin, Mary Jane; Kim, H. S.; McFarland, G.

In: Proceedings-IEEE International Conference on Computer Design: VLSI in Computers and Processors, 01.01.2002, p. 382-387.

Research output: Contribution to journalArticle

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