Impact of total and partial dipole switching on the switching slope of gate-last negative capacitance FETs with ferroelectric hafnium zirconium oxide gate stack

P. Sharma, K. Tapily, A. K. Saha, J. Zhang, A. Shaughnessy, A. Aziz, G. L. Snider, S. Gupta, R. D. Clark, S. Datta

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    50 Scopus citations

    Abstract

    We report, for the first time, a gate last process, used to fabricate Negative Capacitance field effect transistors (NCFETs) with Hf0.5Zr0.5O2 (HZO) as ferroelectric (FE) dielectric in a metal/ferroelectric/insulator/semiconductor (MFIS) configuration. Long channel NCFET's with HZO thickness down to 5 nm exhibit consistent switching behavior with switching slope (SSrev) below kT/q over four decades of drain current. Temperature dependent transport study shows that, the effective mobility of HZO NCFETs is 15 % higher than that of HfO2 based control MOSFETs due to suppression of Hf diffusion into the interfacial SiO2 layer (IL). Using the Preisach hysteresis model, which models dynamics of FE switching through a cluster of independent switching dipoles at arbitrary electric field, we (a) explain the asymmetric SS behavior of NCFETs in MFIS configuration, and (b) establish design guidelines for achieving sub-kT/q SS in both forward and reverse sweep direction.

    Original languageEnglish (US)
    Title of host publication2017 Symposium on VLSI Technology, VLSI Technology 2017
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    PagesT154-T155
    ISBN (Electronic)9784863486058
    DOIs
    StatePublished - Jul 31 2017
    Event37th Symposium on VLSI Technology, VLSI Technology 2017 - Kyoto, Japan
    Duration: Jun 5 2017Jun 8 2017

    Publication series

    NameDigest of Technical Papers - Symposium on VLSI Technology
    ISSN (Print)0743-1562

    Other

    Other37th Symposium on VLSI Technology, VLSI Technology 2017
    CountryJapan
    CityKyoto
    Period6/5/176/8/17

    All Science Journal Classification (ASJC) codes

    • Electrical and Electronic Engineering

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  • Cite this

    Sharma, P., Tapily, K., Saha, A. K., Zhang, J., Shaughnessy, A., Aziz, A., Snider, G. L., Gupta, S., Clark, R. D., & Datta, S. (2017). Impact of total and partial dipole switching on the switching slope of gate-last negative capacitance FETs with ferroelectric hafnium zirconium oxide gate stack. In 2017 Symposium on VLSI Technology, VLSI Technology 2017 (pp. T154-T155). [7998160] (Digest of Technical Papers - Symposium on VLSI Technology). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/VLSIT.2017.7998160