Increasing data TLB resilience to transient errors

Feihui Li, Mahmut Kandemir

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

This paper first demonstrates that a large fraction of data TLB entries are dead (i.e., not used again before being replaced) for many applications at any given time during execution. Based on this observation, it then proposes two alternate schemes that replicate actively accessed data TLB entries in these dead entries to increase the resilience of the TLB against transient errors.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design
EditorsA. Smailagic, N. Ranganathan
Pages297-298
Number of pages2
Publication statusPublished - Oct 25 2005
EventIEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design - Tampa, FL, United States
Duration: May 11 2005May 12 2005

Publication series

NameProceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI

Other

OtherIEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design
CountryUnited States
CityTampa, FL
Period5/11/055/12/05

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All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Li, F., & Kandemir, M. (2005). Increasing data TLB resilience to transient errors. In A. Smailagic, & N. Ranganathan (Eds.), Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design (pp. 297-298). (Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI).