Abstract
This paper first demonstrates that a large fraction of data TLB entries are dead (i.e., not used again before being replaced) for many applications at any given time during execution. Based on this observation, it then proposes two alternate schemes that replicate actively accessed data TLB entries in these dead entries to increase the resilience of the TLB against transient errors.
| Original language | English (US) |
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| Title of host publication | Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design |
| Editors | A. Smailagic, N. Ranganathan |
| Pages | 297-298 |
| Number of pages | 2 |
| Publication status | Published - Oct 25 2005 |
| Event | IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design - Tampa, FL, United States Duration: May 11 2005 → May 12 2005 |
Publication series
| Name | Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI |
|---|
Other
| Other | IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design |
|---|---|
| Country | United States |
| City | Tampa, FL |
| Period | 5/11/05 → 5/12/05 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
Cite this
Li, F., & Kandemir, M. (2005). Increasing data TLB resilience to transient errors. In A. Smailagic, & N. Ranganathan (Eds.), Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design (pp. 297-298). (Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI).