With continued scaling of Si CMOS technology, new channel materials and device architectures are needed to address power consumption and constrained high-speed operation. With the demonstration of n-channel III-V transistors, the development of equivalent p-channel transistor is mandatory to realize energy-efficient CMOS logic. The bulk transport properties of Ge make it an ideal candidate for p-channel transistor. The ultra-high hole mobility Ge can be realized through a III-V/Ge/III-V transistor configuration with different surface orientations would enable much faster switching, thus addressing dynamic power consumption, while the superior high-gate dielectric and larger bandgap barrier would help minimize OFF-state leakage. This paper discusses the i) in-situ growth of III-V/Ge/III-V heterostructure, ii) tailor-made surface orientations of Ge enable to achieve both high-hole and high-electron mobilities, and iii) band offsets of high-κ dielectrics on crystallographic oriented epitaxial (100)Ge, (110)Ge, and (111)Ge layers using solid state molecular beam epitaxy.
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