Vision and video applications are becoming pervasive in mobile and embedded systems. Consumer wearable devices require capabilities for real-time video analytics and prolonged battery lifetimes, which is further driving the need for innovative system designs with low-power, reliability and high performance. Further, the increasing resolution of image sensors in these mobile systems places an increasing demand on both the memory storage as well as the computational power. Such stringent requirements have given rise to accelerator-rich architectures in system on-chips, where the primary computational burden is handled by dedicated hardware accelerators. In this paper we provide an overview of the current state-of-the-art in vision accelerators. We further discuss the opportunities to improve energy efficiency by minimizing Dynamic Random Access Memory (DRAM) refreshes and explore techniques to exploit algorithmic resilience for reduction in compute units while maintaining reliable system accuracy and performance.