Abstract
In this paper, a design on intra-chip optical interconnects based on a wavelength multiplexed two layer structure is presented. The key to this approach is the use of one planar waveguide covering the whole multi chip module and its use of unique tunable diffractive optics elements (DOE). In the bottom layer, there are multiple modules. In each module, there is a light receiver (e.g., a pin photodiode) to receive the clock signal and another to receive information from other individual processing units (IPUs). There is also a light emitter (e.g., a tiny polymer LED) to send information out to other IPUs. The vertical light emitter will send the signal to the upper layer polymer 2-D planar waveguide. To determine which IPUs receive information, a set of fast speed wavelength tunable filters will be fabricated on the polymer waveguide and integrated together with each light source. As a result, we can realize arbitrary reconfigurable interconnects between the entire individual processing units. For example, if the wavelength for the first processing unit is tuned at λ2, only the second processing unit can receive this signal because only the second volume holographic grating can diffract wavelength λ2. Since all tunable filters can be addressed simultaneously, the whole interconnect system is parallel processing.
Original language | English (US) |
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Pages (from-to) | 128-136 |
Number of pages | 9 |
Journal | Proceedings of SPIE - The International Society for Optical Engineering |
Volume | 3470 |
DOIs | |
State | Published - Dec 1 1998 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Computer Science Applications
- Applied Mathematics
- Electrical and Electronic Engineering