Investigating simple low latency reliable multiported register files

Andrew J. Ricketts, Madhu Mutyam, Vijaykrishnan Narayanan, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

Multiport register files are a key component in the design and operation of high performance microprocessors. Due to the frequency of accesses of these register files per clock cycle errors manifested here can potentially spread rapidly. This can seriously compromise the validity of data and even system reliability. Errors may be caused from any number of possible sources including radiation induced soft errors, read or write errors, and permanent device errors. This work focuses on combating errors that affect a stored entry in a register file, but our techniques can often also detect and recover from many other potential sources of errors. Up to 4 bit errors are detectable with 6.25% storage overhead over an unprotected register file. The recovery for most types of errors requires in the order of a few nanoseconds and requires 4% less energy than a monolithic register file with comparable characteristics but no error protection.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publicationEmerging VLSI Technologies and Architectures
Pages375-380
Number of pages6
DOIs
StatePublished - Nov 28 2007
EventIEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07 - Porto Alegre, Brazil
Duration: Mar 9 2007Mar 11 2007

Publication series

NameProceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures

Other

OtherIEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07
CountryBrazil
CityPorto Alegre
Period3/9/073/11/07

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Ricketts, A. J., Mutyam, M., Narayanan, V., & Irwin, M. J. (2007). Investigating simple low latency reliable multiported register files. In Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (pp. 375-380). [4208943] (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures). https://doi.org/10.1109/ISVLSI.2007.62