Leakage energy management in cache hierarchies

L. Li, I. Kadayif, Y. F. Tsai, Vijaykrishnan Narayanan, Mahmut Kandemir, Mary Jane Irwin, Anand Sivasubramaniam

Research output: Chapter in Book/Report/Conference proceedingConference contribution

65 Citations (Scopus)

Abstract

Energy management is important for a spectrum of systems ranging from high-performance architectures to low-end mobile and embedded devices. With the increasing number of transistors, smaller feature sizes, lower supply and threshold voltages, the focus on energy optimization is shifting from dynamic to leakage energy. Leakage energy is of particular concern in dense cache memories that form a major portion of the transistor budget. In this work, we present several architectural techniques that exploit the data duplication across the different levels of cache hierarchy. Specifically, we employ both state-preserving (data-retaining) and state-destroying leakage control mechanisms to L2 subblocks when their data also exist in L1. Using a set of media and array-dominated applications, we demonstrate the effectiveness of the proposed techniques through cycle-accurate simulation. We also compare our schemes with the previously proposed cache decay policy. This comparison indicates that one of our schemes generates competitive results with cache decay.

Original languageEnglish (US)
Title of host publicationProceedings - 2002 International Conference on Parallel Architectures and Compilation Techniques, PACT 2002
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages131-140
Number of pages10
ISBN (Electronic)0769516203
DOIs
StatePublished - Jan 1 2002
EventInternational Conference on Parallel Architectures and Compilation Techniques, PACT 2002 - Charlottesville, United States
Duration: Sep 22 2002Sep 25 2002

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
Volume2002-January
ISSN (Print)1089-795X

Other

OtherInternational Conference on Parallel Architectures and Compilation Techniques, PACT 2002
CountryUnited States
CityCharlottesville
Period9/22/029/25/02

Fingerprint

Energy Management
Energy management
Leakage
Cache
Transistors
Cache memory
Threshold voltage
Decay
Energy Optimization
Duplication
Energy
High Performance
Voltage
Cycle
Demonstrate
Hierarchy
Simulation
Architecture

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

Cite this

Li, L., Kadayif, I., Tsai, Y. F., Narayanan, V., Kandemir, M., Irwin, M. J., & Sivasubramaniam, A. (2002). Leakage energy management in cache hierarchies. In Proceedings - 2002 International Conference on Parallel Architectures and Compilation Techniques, PACT 2002 (pp. 131-140). [1106012] (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT; Vol. 2002-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PACT.2002.1106012
Li, L. ; Kadayif, I. ; Tsai, Y. F. ; Narayanan, Vijaykrishnan ; Kandemir, Mahmut ; Irwin, Mary Jane ; Sivasubramaniam, Anand. / Leakage energy management in cache hierarchies. Proceedings - 2002 International Conference on Parallel Architectures and Compilation Techniques, PACT 2002. Institute of Electrical and Electronics Engineers Inc., 2002. pp. 131-140 (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).
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Li, L, Kadayif, I, Tsai, YF, Narayanan, V, Kandemir, M, Irwin, MJ & Sivasubramaniam, A 2002, Leakage energy management in cache hierarchies. in Proceedings - 2002 International Conference on Parallel Architectures and Compilation Techniques, PACT 2002., 1106012, Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, vol. 2002-January, Institute of Electrical and Electronics Engineers Inc., pp. 131-140, International Conference on Parallel Architectures and Compilation Techniques, PACT 2002, Charlottesville, United States, 9/22/02. https://doi.org/10.1109/PACT.2002.1106012

Leakage energy management in cache hierarchies. / Li, L.; Kadayif, I.; Tsai, Y. F.; Narayanan, Vijaykrishnan; Kandemir, Mahmut; Irwin, Mary Jane; Sivasubramaniam, Anand.

Proceedings - 2002 International Conference on Parallel Architectures and Compilation Techniques, PACT 2002. Institute of Electrical and Electronics Engineers Inc., 2002. p. 131-140 1106012 (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT; Vol. 2002-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Li L, Kadayif I, Tsai YF, Narayanan V, Kandemir M, Irwin MJ et al. Leakage energy management in cache hierarchies. In Proceedings - 2002 International Conference on Parallel Architectures and Compilation Techniques, PACT 2002. Institute of Electrical and Electronics Engineers Inc. 2002. p. 131-140. 1106012. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT). https://doi.org/10.1109/PACT.2002.1106012