Linear and quadratic interpolators using truncated-matrix multipliers and squarers

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Abstract

This paper presents a technique for designing linear and quadratic interpolators for function approximation using truncated multipliers and squarers. Initial coefficient values are found using a Chebyshev-series approximation and then adjusted through exhaustive simulation to minimize the maximum absolute error of the interpolator output. This technique is suitable for any function and any precision up to 24 bits (IEEE single precision). Designs for linear and quadratic interpolators that implement the 1/x, 1/√ x, log 2 (1+2 x ), log 2 (x) and 2 x functions are presented and analyzed as examples. Results show that a proposed 24-bit interpolator computing 1/x with a design specification of ±1 unit in the last place of the product (ulp) error uses 16.4% less area and 15.3% less power than a comparable standard interpolator with the same error specification. Sixteen-bit linear interpolators for other functions are shown to use up to 17.3% less area and 12.1% less power, and 16-bit quadratic interpolators are shown to use up to 25.8% less area and 24.7% less power.

Original languageEnglish (US)
Pages (from-to)293-321
Number of pages29
JournalComputers
Volume4
Issue number4
DOIs
StatePublished - Dec 2015

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All Science Journal Classification (ASJC) codes

  • Human-Computer Interaction
  • Computer Networks and Communications

Cite this

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abstract = "This paper presents a technique for designing linear and quadratic interpolators for function approximation using truncated multipliers and squarers. Initial coefficient values are found using a Chebyshev-series approximation and then adjusted through exhaustive simulation to minimize the maximum absolute error of the interpolator output. This technique is suitable for any function and any precision up to 24 bits (IEEE single precision). Designs for linear and quadratic interpolators that implement the 1/x, 1/√ x, log 2 (1+2 x ), log 2 (x) and 2 x functions are presented and analyzed as examples. Results show that a proposed 24-bit interpolator computing 1/x with a design specification of ±1 unit in the last place of the product (ulp) error uses 16.4{\%} less area and 15.3{\%} less power than a comparable standard interpolator with the same error specification. Sixteen-bit linear interpolators for other functions are shown to use up to 17.3{\%} less area and 12.1{\%} less power, and 16-bit quadratic interpolators are shown to use up to 25.8{\%} less area and 24.7{\%} less power.",
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Linear and quadratic interpolators using truncated-matrix multipliers and squarers. / Walters, E. George.

In: Computers, Vol. 4, No. 4, 12.2015, p. 293-321.

Research output: Contribution to journalArticle

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