Link idle period exploitation for network power management

Feihui Li, Guangyu Chen, Mahmut Kandemir, Mustafa Karakoy

Research output: Chapter in Book/Report/Conference proceedingChapter

1 Scopus citations

Abstract

Network power optimization is becoming increasingly important as the sizes of the data manipulated by parallel applications and the complexity of interprocessor data communications are continuously increasing. Several hardware-based schemes have been proposed in the past for reducing network power consumption, either by turning off unused communication links or by lowering voltage/frequency in links with low usage. While the prior research shows that these schemes can be effective in certain cases, they share the common drawback of not being able to predict the link active and idle times very accurately. This paper, instead, proposes a compiler-based scheme that determines the last use of communication links at each loop nest and inserts explicit link turn-off calls in the application source. Specifically, for each loop nest, the compiler inserts a turn-off call per communication link. Each turnedoff link is reactivated upon the next access to it. We automated this approach within a parallelizing compiler and applied it to eight array-intensive embedded applications. Our experimental analysis reveals that the proposed approach is very promising from both performance and power perspectives. In particular, it saves more energy than a pure hardware-based scheme while incurring much less performance penalty than the latter.

Original languageEnglish (US)
Title of host publicationDesigning Embedded Processors
Subtitle of host publicationA Low Power Perspective
PublisherSpringer Netherlands
Pages325-345
Number of pages21
ISBN (Print)9781402058684
DOIs
StatePublished - Dec 1 2007

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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