Logarithmic number system for strength reduction in adaptive filtering

John R. Sacha, Mary Jane Irwin

Research output: Contribution to conferencePaperpeer-review

11 Scopus citations

Abstract

An important technique for reducing power consumption in VLSI systems is strength reduction, the substitution of a less-costly operation such as a shift, for a more-costly operation such a multiplication. Using a logarithmic number representation provides several opportunities for strength reductions; in particular, multiplication is performed as the fixed-point addition of logarithms, and extracting a square root is implemented via a shift. These reductions occur transparently at the hardware level; consequently relatively little algorithmic modification is required, and they are readily applicable to adaptive filtering. For performing Givens rotations in the QR decomposition recursive least squares adaptive filter, logarithmic arithmetic is shown to compare favorably to other strength reduction techniques, such as CORDIC arithmetic, in terms of switched capacitance and numerical accuracy.

Original languageEnglish (US)
Pages256-261
Number of pages6
DOIs
StatePublished - 1998
EventProceedings of the 1998 International Symposium on Low Power Electronics and Design - Monterey, CA, USA
Duration: Aug 10 1998Aug 12 1998

Other

OtherProceedings of the 1998 International Symposium on Low Power Electronics and Design
CityMonterey, CA, USA
Period8/10/988/12/98

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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