The interface quality of a low temperature atomic-layer-deposited (ALD) HfO2/Al2O3 bilayer high-Κ gate dielectric on a GaAs0.35Sb0.65 channel for heterojunction p-channel tunneling FETs is investigated. Lowering the ALD temperature from 250 to 110 °C results in improved capacitance- voltage characteristics and lower interface trap density in metal-oxide-semiconductor capacitor structures. Using the low-temperature ALD high-Κ dielectric, a GaAs0.35Sb0.65/In 0.7Ga0.3As heterojunction p-channel tunneling FET is demonstrated with an improved switching slope and higher on-off current ratio. X-ray photoelectron spectroscopy is performed to investigate the effect of the deposition temperature on the chemical composition of the high-Κ/GaAs 0.35Sb0.65 interface.
All Science Journal Classification (ASJC) codes
- Physics and Astronomy(all)