Low-voltage ZnO double-gate thin film transistor circuits

Yuanyuan V. Li, J. Israel Ramirez, Kaige G. Sun, Thomas N. Jackson

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

We report here double-gate ZnO thin film transistor (TFT) circuits with operation at low voltage. TFTs with low voltage operation have been reported previously, but often use very thin (few nm thick) gate dielectric which may limit manufacturability [1]. Oxide semiconductor-based TFTs have been extensively studied as competitive candidates for next-generation display technology and other large-area electronics. For many applications, operation at voltages compatible with low-voltage CMOS is important. Double-gate TFTs are of interest because they allow threshold voltage tuning, improved device performance, and circuit applications like mixers. [2,3] We have previously reported bottom-gate ZnO TFTs and circuits fabricated on glass and flexible polymeric substrates using plasma enhanced atomic layer deposition (PEALD) [4,5]. Here we report double-gate ZnO TFTs and circuits fabricated on glass substrates using PEALD with a maximum process temperature of 200 °C. Compared to bottom-gate ZnO TFTs, double-gate ZnO TFTs have higher mobility, and reduced substhreshold slope. In these devices, the top gate can be used to vary the bottom-gate threshold voltage by more than 4 V. This allows the logic transition point for circuits to be adjusted as desired and allows logic operation at low voltage. 15 stage double-gate ZnO TFT ring oscillators operate well with V DD = 1.2 V, I D = 32 μA, and propagation delay of 2.1 μs/stage.

Original languageEnglish (US)
Title of host publication70th Device Research Conference, DRC 2012 - Conference Digest
Pages239-240
Number of pages2
DOIs
StatePublished - Oct 5 2012
Event70th Device Research Conference, DRC 2012 - University Park, PA, United States
Duration: Jun 18 2012Jun 20 2012

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770

Other

Other70th Device Research Conference, DRC 2012
CountryUnited States
CityUniversity Park, PA
Period6/18/126/20/12

Fingerprint

Thin film transistors
Networks (circuits)
Electric potential
Atomic layer deposition
Threshold voltage
Gates (transistor)
Plasmas
Glass
Mixer circuits
Gate dielectrics
Substrates
Electronic equipment
Tuning
Display devices
Temperature

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Li, Y. V., Ramirez, J. I., Sun, K. G., & Jackson, T. N. (2012). Low-voltage ZnO double-gate thin film transistor circuits. In 70th Device Research Conference, DRC 2012 - Conference Digest (pp. 239-240). [6256969] (Device Research Conference - Conference Digest, DRC). https://doi.org/10.1109/DRC.2012.6256969
Li, Yuanyuan V. ; Ramirez, J. Israel ; Sun, Kaige G. ; Jackson, Thomas N. / Low-voltage ZnO double-gate thin film transistor circuits. 70th Device Research Conference, DRC 2012 - Conference Digest. 2012. pp. 239-240 (Device Research Conference - Conference Digest, DRC).
@inproceedings{a3f93806aaaf4b3f8841ad61503ced75,
title = "Low-voltage ZnO double-gate thin film transistor circuits",
abstract = "We report here double-gate ZnO thin film transistor (TFT) circuits with operation at low voltage. TFTs with low voltage operation have been reported previously, but often use very thin (few nm thick) gate dielectric which may limit manufacturability [1]. Oxide semiconductor-based TFTs have been extensively studied as competitive candidates for next-generation display technology and other large-area electronics. For many applications, operation at voltages compatible with low-voltage CMOS is important. Double-gate TFTs are of interest because they allow threshold voltage tuning, improved device performance, and circuit applications like mixers. [2,3] We have previously reported bottom-gate ZnO TFTs and circuits fabricated on glass and flexible polymeric substrates using plasma enhanced atomic layer deposition (PEALD) [4,5]. Here we report double-gate ZnO TFTs and circuits fabricated on glass substrates using PEALD with a maximum process temperature of 200 °C. Compared to bottom-gate ZnO TFTs, double-gate ZnO TFTs have higher mobility, and reduced substhreshold slope. In these devices, the top gate can be used to vary the bottom-gate threshold voltage by more than 4 V. This allows the logic transition point for circuits to be adjusted as desired and allows logic operation at low voltage. 15 stage double-gate ZnO TFT ring oscillators operate well with V DD = 1.2 V, I D = 32 μA, and propagation delay of 2.1 μs/stage.",
author = "Li, {Yuanyuan V.} and Ramirez, {J. Israel} and Sun, {Kaige G.} and Jackson, {Thomas N.}",
year = "2012",
month = "10",
day = "5",
doi = "10.1109/DRC.2012.6256969",
language = "English (US)",
isbn = "9781467311618",
series = "Device Research Conference - Conference Digest, DRC",
pages = "239--240",
booktitle = "70th Device Research Conference, DRC 2012 - Conference Digest",

}

Li, YV, Ramirez, JI, Sun, KG & Jackson, TN 2012, Low-voltage ZnO double-gate thin film transistor circuits. in 70th Device Research Conference, DRC 2012 - Conference Digest., 6256969, Device Research Conference - Conference Digest, DRC, pp. 239-240, 70th Device Research Conference, DRC 2012, University Park, PA, United States, 6/18/12. https://doi.org/10.1109/DRC.2012.6256969

Low-voltage ZnO double-gate thin film transistor circuits. / Li, Yuanyuan V.; Ramirez, J. Israel; Sun, Kaige G.; Jackson, Thomas N.

70th Device Research Conference, DRC 2012 - Conference Digest. 2012. p. 239-240 6256969 (Device Research Conference - Conference Digest, DRC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Low-voltage ZnO double-gate thin film transistor circuits

AU - Li, Yuanyuan V.

AU - Ramirez, J. Israel

AU - Sun, Kaige G.

AU - Jackson, Thomas N.

PY - 2012/10/5

Y1 - 2012/10/5

N2 - We report here double-gate ZnO thin film transistor (TFT) circuits with operation at low voltage. TFTs with low voltage operation have been reported previously, but often use very thin (few nm thick) gate dielectric which may limit manufacturability [1]. Oxide semiconductor-based TFTs have been extensively studied as competitive candidates for next-generation display technology and other large-area electronics. For many applications, operation at voltages compatible with low-voltage CMOS is important. Double-gate TFTs are of interest because they allow threshold voltage tuning, improved device performance, and circuit applications like mixers. [2,3] We have previously reported bottom-gate ZnO TFTs and circuits fabricated on glass and flexible polymeric substrates using plasma enhanced atomic layer deposition (PEALD) [4,5]. Here we report double-gate ZnO TFTs and circuits fabricated on glass substrates using PEALD with a maximum process temperature of 200 °C. Compared to bottom-gate ZnO TFTs, double-gate ZnO TFTs have higher mobility, and reduced substhreshold slope. In these devices, the top gate can be used to vary the bottom-gate threshold voltage by more than 4 V. This allows the logic transition point for circuits to be adjusted as desired and allows logic operation at low voltage. 15 stage double-gate ZnO TFT ring oscillators operate well with V DD = 1.2 V, I D = 32 μA, and propagation delay of 2.1 μs/stage.

AB - We report here double-gate ZnO thin film transistor (TFT) circuits with operation at low voltage. TFTs with low voltage operation have been reported previously, but often use very thin (few nm thick) gate dielectric which may limit manufacturability [1]. Oxide semiconductor-based TFTs have been extensively studied as competitive candidates for next-generation display technology and other large-area electronics. For many applications, operation at voltages compatible with low-voltage CMOS is important. Double-gate TFTs are of interest because they allow threshold voltage tuning, improved device performance, and circuit applications like mixers. [2,3] We have previously reported bottom-gate ZnO TFTs and circuits fabricated on glass and flexible polymeric substrates using plasma enhanced atomic layer deposition (PEALD) [4,5]. Here we report double-gate ZnO TFTs and circuits fabricated on glass substrates using PEALD with a maximum process temperature of 200 °C. Compared to bottom-gate ZnO TFTs, double-gate ZnO TFTs have higher mobility, and reduced substhreshold slope. In these devices, the top gate can be used to vary the bottom-gate threshold voltage by more than 4 V. This allows the logic transition point for circuits to be adjusted as desired and allows logic operation at low voltage. 15 stage double-gate ZnO TFT ring oscillators operate well with V DD = 1.2 V, I D = 32 μA, and propagation delay of 2.1 μs/stage.

UR - http://www.scopus.com/inward/record.url?scp=84866916651&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84866916651&partnerID=8YFLogxK

U2 - 10.1109/DRC.2012.6256969

DO - 10.1109/DRC.2012.6256969

M3 - Conference contribution

AN - SCOPUS:84866916651

SN - 9781467311618

T3 - Device Research Conference - Conference Digest, DRC

SP - 239

EP - 240

BT - 70th Device Research Conference, DRC 2012 - Conference Digest

ER -

Li YV, Ramirez JI, Sun KG, Jackson TN. Low-voltage ZnO double-gate thin film transistor circuits. In 70th Device Research Conference, DRC 2012 - Conference Digest. 2012. p. 239-240. 6256969. (Device Research Conference - Conference Digest, DRC). https://doi.org/10.1109/DRC.2012.6256969