Making B+ -tree efficient in PCM-based main memory

Ping Chi, Wang Chien Lee, Yuan Xie

Research output: Chapter in Book/Report/Conference proceedingConference contribution

27 Scopus citations

Abstract

Phase change memory (PCM) is a promising technology for building future large-scale and low-power main memory systems. Main memory databases (MMDBs) can benefit from the high density of PCM. However, its long write latency, high write energy, and limited lifetime, bring challenges to database algorithm design for PCM-based memory systems. In this paper, we focus on making B +-tree PCM-friendly by reducing the write accesses to PCM. We propose three different schemes. Experimental results show that they can efficiently improve the performance, reduce the memory energy consumption, and improve the lifetime for PCM memory.

Original languageEnglish (US)
Title of host publicationISLPED 2014 - Proceedings of the 2014 International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages69-74
Number of pages6
ISBN (Print)9781450329750
DOIs
StatePublished - 2014
Event2014 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2014 - San Diego, CA, United States
Duration: Aug 11 2014Aug 13 2014

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other2014 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2014
CountryUnited States
CitySan Diego, CA
Period8/11/148/13/14

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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