Memory-conscious reliable execution on embedded chip multiprocessors

G. Chen, Mahmut Kandemir, I. Kolcu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Code and data duplication has been identified as one of the important mechanisms for improving reliability. In a chip multiprocessor-based execution environment, while it is possible to hide the overhead of code duplication through parallelism, hiding the memory space overhead incurred by data duplication is more difficult. This paper presents a compiler-directed memory-conscious data duplication scheme that tries to minimize the extra memory space required by duplicate execution. The proposed approach achieves this goal by using the memory locations that hold dead data to store the duplicates of the actively-used data. In this way, instead of using extra memory storage for duplicate elements, we use the existing memory locations to the extent allowed by usage patterns of data. The results collected from our experiments clearly show that the proposed approach saves significant memory space, as compared to a straightforward approach that implements full duplication.

Original languageEnglish (US)
Title of host publicationProceedings - DSN 2006
Subtitle of host publication2006 International Conference on Dependable Systems and Networks
Pages13-22
Number of pages10
DOIs
StatePublished - Dec 22 2006
EventDSN 2006: 2006 International Conference on Dependable Systems and Networks - Philadelphia, PA, United States
Duration: Jun 25 2006Jun 28 2006

Publication series

NameProceedings of the International Conference on Dependable Systems and Networks
Volume2006

Other

OtherDSN 2006: 2006 International Conference on Dependable Systems and Networks
CountryUnited States
CityPhiladelphia, PA
Period6/25/066/28/06

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Computer Networks and Communications

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    Chen, G., Kandemir, M., & Kolcu, I. (2006). Memory-conscious reliable execution on embedded chip multiprocessors. In Proceedings - DSN 2006: 2006 International Conference on Dependable Systems and Networks (pp. 13-22). [1633491] (Proceedings of the International Conference on Dependable Systems and Networks; Vol. 2006). https://doi.org/10.1109/DSN.2006.51