MESH ARRAYS AND LOGICIAN: A TOOL FOR THEIR EFFICIENT GENERATION.

Janet Ann Beekman, Robert Michael Owens, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

The authors introduce a standard structure for VLSI design, the mesh array, and describe a design tool called LOGICIAN which minimizes a set of functions for realization in CMOS mesh arrays. LOGICIAN features multilevel logic in synthesis through recursive enumeration of each function. Several techniques to speed-up the minimization process in LOGICIAN are described.

Original languageEnglish (US)
Title of host publicationProceedings - Design Automation Conference
PublisherIEEE
Pages357-362
Number of pages6
ISBN (Print)0818607815, 9780818607813
DOIs
StatePublished - Jan 1 1987

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0146-7123

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Beekman, J. A., Owens, R. M., & Irwin, M. J. (1987). MESH ARRAYS AND LOGICIAN: A TOOL FOR THEIR EFFICIENT GENERATION. In Proceedings - Design Automation Conference (pp. 357-362). (Proceedings - Design Automation Conference). IEEE. https://doi.org/10.1145/37888.37942