Modeling and comparative analysis of hysteretic ferroelectric and anti-ferroelectric FETs

Atanu K. Saha, Sumeet K. Gupta

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

In this paper, we analyze ferroelectric (FE) and anti-ferroelectric (AFE) field effect transistors (FETs) (shown in Fig. 1(a)) and compare their subthreshold characteristics and hysteretic behavior. To facilitate this analysis, we develop a Preisach based [1] circuit compatible model for FE/AFE. Whereas in FE capacitor the two stable polarization (P) states are -PR and +PR, in case of AFE capacitor, non-volatility can be achieved within →+PR by imposing a built-in potential through work-function engineering (Fig, 1(b)). However, in FE/APEFETs, FE/AFE can be partially polarized (forming minor P-Vloop), which we analyze in this paper. Finally, correlating the negative capacitance (NC) effect in FE/AFE with domain-wall propagation [2], we explore the steep subthreshold swing (SS) characteristics of FE/APE-FET and analyze their transient nature and dependence on flat-band voltage (VFB) and maximum applied gate voltage (VGS).

Original languageEnglish (US)
Title of host publication2018 76th Device Research Conference, DRC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781538630280
DOIs
StatePublished - Aug 20 2018
Event76th Device Research Conference, DRC 2018 - Santa Barbara, United States
Duration: Jun 24 2018Jun 27 2018

Publication series

NameDevice Research Conference - Conference Digest, DRC
Volume2018-June
ISSN (Print)1548-3770

Other

Other76th Device Research Conference, DRC 2018
CountryUnited States
CitySanta Barbara
Period6/24/186/27/18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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