It is well known that while applying a compiler optimization to a large scope of code (e.g., an entire procedure or function) can bring larger benefits in return as compared to smaller scopes (e.g., a nested loop), code analysis and optimization at larger scopes are also more difficult to manage. As of today, the largest scope for a compiler optimization is an entire program source. However, as embedded chip multiprocessor architectures are finding their ways into commercial products, it is becoming important to consider the scenario of multiple applications executing on the same chip multiprocessor. This paper explores a novel technique called multicompilation where multiple applications that are expected to be executed simultaneously on the same CMP (chip multiprocessor) are compiled together. The benefits of this approach include capturing the interactions amongst applications due to data sharing. While one can think of many potential optimizations that can work in an inter-application fashion exploiting data sharing across applications, we restrict ourselves in this paper to data layout optimization, which is the problem of determining the most suitable memory layout for array data. To demonstrate the impact of our contribution, we implemented our approach and performed a simulation-based study with several embedded applications. Our experimental results show that, by selecting the memory layouts of data arrays considering multiple applications at the same time, we can reduce cache misses by 18.7% and execution cycles by 13.1% on average.