TY - JOUR
T1 - New-age
T2 - A negative bias temperature instability-estimation framework for microarchitectural components
AU - Debole, Michael
AU - Krishnan, Ramakrishnan
AU - Balakrishnan, Varsha
AU - Wang, Wenping
AU - Luo, Hong
AU - Wang, Yu
AU - Xie, Yuan
AU - Cao, Yu
AU - Vijaykrishnan, N.
N1 - Funding Information:
Acknowledgements This project was supported by SRC’s GSRC Focus Center and NSF Grants 0702617, 0454123, 90207002, and 60870001. The authors would also like to thank Toyota for a generous donation towards this project.
PY - 2009/8
Y1 - 2009/8
N2 - Degradation of device parameters over the lifetime of a system is emerging as a significant threat to system reliability. Among the aging mechanisms, wearout resulting from Negative Bias Temperature Instability (NBTI) is of particular concern in deep submicron technology generations. While there has been significant effort at the device and circuit level to model and characterize the impact of NBTI, the analysis of NBTI's impact at the architectural level is still at its infancy. To facilitate architectural level aging analysis, a tool capable of evaluating NBTI vulnerabilities early in the design cycle has been developed that evaluates timing degradation due to NBTI. The tool includes workload-based temperature and performance degradation analysis across a variety of technologies and operating conditions, revealing a complex interplay between factors influencing NBTI timing degradation.
AB - Degradation of device parameters over the lifetime of a system is emerging as a significant threat to system reliability. Among the aging mechanisms, wearout resulting from Negative Bias Temperature Instability (NBTI) is of particular concern in deep submicron technology generations. While there has been significant effort at the device and circuit level to model and characterize the impact of NBTI, the analysis of NBTI's impact at the architectural level is still at its infancy. To facilitate architectural level aging analysis, a tool capable of evaluating NBTI vulnerabilities early in the design cycle has been developed that evaluates timing degradation due to NBTI. The tool includes workload-based temperature and performance degradation analysis across a variety of technologies and operating conditions, revealing a complex interplay between factors influencing NBTI timing degradation.
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U2 - 10.1007/s10766-009-0104-y
DO - 10.1007/s10766-009-0104-y
M3 - Article
AN - SCOPUS:67651006381
SN - 0885-7458
VL - 37
SP - 417
EP - 431
JO - International Journal of Parallel Programming
JF - International Journal of Parallel Programming
IS - 4
ER -