Non-silicon logic elements on silicon for extreme voltage scaling

S. Datta, A. Ali, S. Mookerjea, V. Saripalli, L. Liu, S. Eachempati, T. Mayer, Vijaykrishnan Narayanan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures - quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.

Original languageEnglish (US)
Title of host publication2010 Silicon Nanoelectronics Workshop, SNW 2010
DOIs
StatePublished - Oct 22 2010
Event2010 15th Silicon Nanoelectronics Workshop, SNW 2010 - Honolulu, HI, United States
Duration: Jun 13 2010Jun 14 2010

Other

Other2010 15th Silicon Nanoelectronics Workshop, SNW 2010
CountryUnited States
CityHonolulu, HI
Period6/13/106/14/10

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Datta, S., Ali, A., Mookerjea, S., Saripalli, V., Liu, L., Eachempati, S., Mayer, T., & Narayanan, V. (2010). Non-silicon logic elements on silicon for extreme voltage scaling. In 2010 Silicon Nanoelectronics Workshop, SNW 2010 [5562592] https://doi.org/10.1109/SNW.2010.5562592