Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power

Kaisheng Ma, Xueqing Li, Karthik Swaminathan, Yang Zheng, Shuangchen Li, Yongpan Liu, Yuan Xie, John Sampson, Vijaykrishnan Narayanan

Research output: Contribution to journalArticle

22 Scopus citations

Abstract

Nonvolatile processors (NVPs) have integrated nonvolatile memory to preserve task-intermediate on-chip state during power emergencies. NVPs hide data backup and restoration from the executing software to provide an execution mode that will always eventually complete the current task. NVPs are emerging as a promising solution for energy-harvesting scenarios, in which the available power supply is unstable and intermittent, because of their ability to ensure that even short periods of sufficient power, on the order of tens of instructions, will result in net forward progress. This article explores the design space for an NVP across different architectures, input power sources, and policies for maximizing forward progress in a framework calibrated using measured results from a fabricated NVP. The authors propose a heterogeneous microarchitecture solution that more efficiently capitalizes on ephemeral power surpluses.

Original languageEnglish (US)
Article number7478428
Pages (from-to)72-83
Number of pages12
JournalIEEE Micro
Volume36
Issue number3
DOIs
StatePublished - May 1 2016

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Ma, K., Li, X., Swaminathan, K., Zheng, Y., Li, S., Liu, Y., Xie, Y., Sampson, J., & Narayanan, V. (2016). Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power. IEEE Micro, 36(3), 72-83. [7478428]. https://doi.org/10.1109/MM.2016.35