Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric

A. L. Corrion, M. Chen, Rongming Chu, S. D. Burnham, S. Khalil, D. Zehnder, B. Hughes, K. Boutros

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

GaN-based HFETs offer a combination of high breakdown field, high current densities, and low on-resistance, making them well-suited for power-switching applications. Normally-off FETs are preferred in power switching applications for circuit simplicity and safety. Recently, a new type of normally-off GaN device has been reported: the hybrid metal-oxide-semiconductor (MOS)- or metal-insulator-semiconductor (MIS)-HFET, consisting of an MOS-type structure under the gate for normally-off operation and an HFET-like structure in the access regions for low on-resistance [1-6]. Optimization of the insulator-epi interface and insulator quality is critical for this type of device, since the electrons under gate electrode are in direct contact with the gate insulator. Previous reports of hybrid MOS-HFETs used SiO2 or SiN gate dielectrics deposited by plasma-enhanced chemical vapor deposition (PECVD). However, alternative deposition methods such as atomic layer deposition (ALD) have been shown to result in superior thickness control, uniformity, conformality, and film quality, while ALD high-k gate dielectrics such as Al2O3 have generated significant interest for GaN HFETs due to excellent GaN interface quality. In this work, we fabricated normally-off AlGaN/GaN hybrid MOS-HFETs on (111) Si substrates using gate recess etching combined with an ALD Al2O3 gate dielectric for low gate leakage, low on-resistance, and high breakdown voltage. The gate fabrication process was optimized to reduce the trap density associated with the dielectric and eliminate threshold voltage hysteresis, which can result from slow traps in the dielectric or at the dielectric-epi interface [7]. A three-terminal breakdown voltage (VB) of 1370V was measured at a gate bias of 0 V on a device with a 20 mm gate periphery and a low specific on-resistance (R on) of 9.0 m-cm2. The resulting VB 2/Ron figure of merit of 208 MW/cm2 is among the highest values reported to-date for normally-off GaN-on-Si HFETs.

Original languageEnglish (US)
Title of host publication69th Device Research Conference, DRC 2011 - Conference Digest
Pages213-214
Number of pages2
DOIs
StatePublished - Dec 1 2011
Event69th Device Research Conference, DRC 2011 - Santa Barbara, CA, United States
Duration: Jun 20 2011Jun 22 2011

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770

Other

Other69th Device Research Conference, DRC 2011
CountryUnited States
CitySanta Barbara, CA
Period6/20/116/22/11

Fingerprint

Gate dielectrics
Atomic layer deposition
Metals
Electric breakdown
Thickness control
Plasma enhanced chemical vapor deposition
Field effect transistors
Threshold voltage
Hysteresis
Etching
Current density
Oxide semiconductors
Semiconductor materials
Fabrication
Electrodes
Electrons
Networks (circuits)
Substrates

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Corrion, A. L., Chen, M., Chu, R., Burnham, S. D., Khalil, S., Zehnder, D., ... Boutros, K. (2011). Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric. In 69th Device Research Conference, DRC 2011 - Conference Digest (pp. 213-214). [5994503] (Device Research Conference - Conference Digest, DRC). https://doi.org/10.1109/DRC.2011.5994503
Corrion, A. L. ; Chen, M. ; Chu, Rongming ; Burnham, S. D. ; Khalil, S. ; Zehnder, D. ; Hughes, B. ; Boutros, K. / Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric. 69th Device Research Conference, DRC 2011 - Conference Digest. 2011. pp. 213-214 (Device Research Conference - Conference Digest, DRC).
@inproceedings{b938d03935f04be7b83327f3576cb2d4,
title = "Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric",
abstract = "GaN-based HFETs offer a combination of high breakdown field, high current densities, and low on-resistance, making them well-suited for power-switching applications. Normally-off FETs are preferred in power switching applications for circuit simplicity and safety. Recently, a new type of normally-off GaN device has been reported: the hybrid metal-oxide-semiconductor (MOS)- or metal-insulator-semiconductor (MIS)-HFET, consisting of an MOS-type structure under the gate for normally-off operation and an HFET-like structure in the access regions for low on-resistance [1-6]. Optimization of the insulator-epi interface and insulator quality is critical for this type of device, since the electrons under gate electrode are in direct contact with the gate insulator. Previous reports of hybrid MOS-HFETs used SiO2 or SiN gate dielectrics deposited by plasma-enhanced chemical vapor deposition (PECVD). However, alternative deposition methods such as atomic layer deposition (ALD) have been shown to result in superior thickness control, uniformity, conformality, and film quality, while ALD high-k gate dielectrics such as Al2O3 have generated significant interest for GaN HFETs due to excellent GaN interface quality. In this work, we fabricated normally-off AlGaN/GaN hybrid MOS-HFETs on (111) Si substrates using gate recess etching combined with an ALD Al2O3 gate dielectric for low gate leakage, low on-resistance, and high breakdown voltage. The gate fabrication process was optimized to reduce the trap density associated with the dielectric and eliminate threshold voltage hysteresis, which can result from slow traps in the dielectric or at the dielectric-epi interface [7]. A three-terminal breakdown voltage (VB) of 1370V was measured at a gate bias of 0 V on a device with a 20 mm gate periphery and a low specific on-resistance (R on) of 9.0 m-cm2. The resulting VB 2/Ron figure of merit of 208 MW/cm2 is among the highest values reported to-date for normally-off GaN-on-Si HFETs.",
author = "Corrion, {A. L.} and M. Chen and Rongming Chu and Burnham, {S. D.} and S. Khalil and D. Zehnder and B. Hughes and K. Boutros",
year = "2011",
month = "12",
day = "1",
doi = "10.1109/DRC.2011.5994503",
language = "English (US)",
isbn = "9781612842417",
series = "Device Research Conference - Conference Digest, DRC",
pages = "213--214",
booktitle = "69th Device Research Conference, DRC 2011 - Conference Digest",

}

Corrion, AL, Chen, M, Chu, R, Burnham, SD, Khalil, S, Zehnder, D, Hughes, B & Boutros, K 2011, Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric. in 69th Device Research Conference, DRC 2011 - Conference Digest., 5994503, Device Research Conference - Conference Digest, DRC, pp. 213-214, 69th Device Research Conference, DRC 2011, Santa Barbara, CA, United States, 6/20/11. https://doi.org/10.1109/DRC.2011.5994503

Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric. / Corrion, A. L.; Chen, M.; Chu, Rongming; Burnham, S. D.; Khalil, S.; Zehnder, D.; Hughes, B.; Boutros, K.

69th Device Research Conference, DRC 2011 - Conference Digest. 2011. p. 213-214 5994503 (Device Research Conference - Conference Digest, DRC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric

AU - Corrion, A. L.

AU - Chen, M.

AU - Chu, Rongming

AU - Burnham, S. D.

AU - Khalil, S.

AU - Zehnder, D.

AU - Hughes, B.

AU - Boutros, K.

PY - 2011/12/1

Y1 - 2011/12/1

N2 - GaN-based HFETs offer a combination of high breakdown field, high current densities, and low on-resistance, making them well-suited for power-switching applications. Normally-off FETs are preferred in power switching applications for circuit simplicity and safety. Recently, a new type of normally-off GaN device has been reported: the hybrid metal-oxide-semiconductor (MOS)- or metal-insulator-semiconductor (MIS)-HFET, consisting of an MOS-type structure under the gate for normally-off operation and an HFET-like structure in the access regions for low on-resistance [1-6]. Optimization of the insulator-epi interface and insulator quality is critical for this type of device, since the electrons under gate electrode are in direct contact with the gate insulator. Previous reports of hybrid MOS-HFETs used SiO2 or SiN gate dielectrics deposited by plasma-enhanced chemical vapor deposition (PECVD). However, alternative deposition methods such as atomic layer deposition (ALD) have been shown to result in superior thickness control, uniformity, conformality, and film quality, while ALD high-k gate dielectrics such as Al2O3 have generated significant interest for GaN HFETs due to excellent GaN interface quality. In this work, we fabricated normally-off AlGaN/GaN hybrid MOS-HFETs on (111) Si substrates using gate recess etching combined with an ALD Al2O3 gate dielectric for low gate leakage, low on-resistance, and high breakdown voltage. The gate fabrication process was optimized to reduce the trap density associated with the dielectric and eliminate threshold voltage hysteresis, which can result from slow traps in the dielectric or at the dielectric-epi interface [7]. A three-terminal breakdown voltage (VB) of 1370V was measured at a gate bias of 0 V on a device with a 20 mm gate periphery and a low specific on-resistance (R on) of 9.0 m-cm2. The resulting VB 2/Ron figure of merit of 208 MW/cm2 is among the highest values reported to-date for normally-off GaN-on-Si HFETs.

AB - GaN-based HFETs offer a combination of high breakdown field, high current densities, and low on-resistance, making them well-suited for power-switching applications. Normally-off FETs are preferred in power switching applications for circuit simplicity and safety. Recently, a new type of normally-off GaN device has been reported: the hybrid metal-oxide-semiconductor (MOS)- or metal-insulator-semiconductor (MIS)-HFET, consisting of an MOS-type structure under the gate for normally-off operation and an HFET-like structure in the access regions for low on-resistance [1-6]. Optimization of the insulator-epi interface and insulator quality is critical for this type of device, since the electrons under gate electrode are in direct contact with the gate insulator. Previous reports of hybrid MOS-HFETs used SiO2 or SiN gate dielectrics deposited by plasma-enhanced chemical vapor deposition (PECVD). However, alternative deposition methods such as atomic layer deposition (ALD) have been shown to result in superior thickness control, uniformity, conformality, and film quality, while ALD high-k gate dielectrics such as Al2O3 have generated significant interest for GaN HFETs due to excellent GaN interface quality. In this work, we fabricated normally-off AlGaN/GaN hybrid MOS-HFETs on (111) Si substrates using gate recess etching combined with an ALD Al2O3 gate dielectric for low gate leakage, low on-resistance, and high breakdown voltage. The gate fabrication process was optimized to reduce the trap density associated with the dielectric and eliminate threshold voltage hysteresis, which can result from slow traps in the dielectric or at the dielectric-epi interface [7]. A three-terminal breakdown voltage (VB) of 1370V was measured at a gate bias of 0 V on a device with a 20 mm gate periphery and a low specific on-resistance (R on) of 9.0 m-cm2. The resulting VB 2/Ron figure of merit of 208 MW/cm2 is among the highest values reported to-date for normally-off GaN-on-Si HFETs.

UR - http://www.scopus.com/inward/record.url?scp=84880717607&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84880717607&partnerID=8YFLogxK

U2 - 10.1109/DRC.2011.5994503

DO - 10.1109/DRC.2011.5994503

M3 - Conference contribution

SN - 9781612842417

T3 - Device Research Conference - Conference Digest, DRC

SP - 213

EP - 214

BT - 69th Device Research Conference, DRC 2011 - Conference Digest

ER -

Corrion AL, Chen M, Chu R, Burnham SD, Khalil S, Zehnder D et al. Normally-off gate-recessed AlGaN/GaN-on-Si hybrid MOS-HFET with Al 2O3 gate dielectric. In 69th Device Research Conference, DRC 2011 - Conference Digest. 2011. p. 213-214. 5994503. (Device Research Conference - Conference Digest, DRC). https://doi.org/10.1109/DRC.2011.5994503