TY - GEN
T1 - Overview of Ferroelectric Memory Devices and Reliability Aware Design Optimization
AU - Deng, Shan
AU - Zhao, Zijian
AU - Kurinec, Santosh
AU - Ni, Kai
AU - Xiao, Yi
AU - Yu, Tongguang
AU - Narayanan, Vijaykrishnan
N1 - Funding Information:
This work was supported by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences Energy Frontier Research Centers program under Award Number DE-SC0021118.
Publisher Copyright:
© 2021 ACM.
PY - 2021/6/22
Y1 - 2021/6/22
N2 - Since the discovery of CMOS-compatible and highly scalable ferroelectric HfO2, there has been a significant revival of interest in developing ferroelectric devices for high performance and energy-efficient embedded nonvolatile memories. Multiple ferroelectric memory devices are under investigation by harnessing the nonvolatile polarization states. These devices include the ferroelectric FET (FeFET), ferroelectric capacitor based random access memory (FeRAM), and ferroelectric tunnel junction (FTJ). Though the underlying memory storage mechanisms are the same in these devices, their memory sensing mechanisms are different. This difference leads to fundamentally different, and even opposite ferroelectric optimization directions. Given their different characteristics and individual advantages, it is likely that all these devices will co-exist to meet varying needs. Therefore, it is important to establish and compare the design guidelines for the three different ferroelectric memory devices. The design optimization will also be constrained by the reliability limit, which is critical to guarantee the success of the ferroelectric memory devices.
AB - Since the discovery of CMOS-compatible and highly scalable ferroelectric HfO2, there has been a significant revival of interest in developing ferroelectric devices for high performance and energy-efficient embedded nonvolatile memories. Multiple ferroelectric memory devices are under investigation by harnessing the nonvolatile polarization states. These devices include the ferroelectric FET (FeFET), ferroelectric capacitor based random access memory (FeRAM), and ferroelectric tunnel junction (FTJ). Though the underlying memory storage mechanisms are the same in these devices, their memory sensing mechanisms are different. This difference leads to fundamentally different, and even opposite ferroelectric optimization directions. Given their different characteristics and individual advantages, it is likely that all these devices will co-exist to meet varying needs. Therefore, it is important to establish and compare the design guidelines for the three different ferroelectric memory devices. The design optimization will also be constrained by the reliability limit, which is critical to guarantee the success of the ferroelectric memory devices.
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U2 - 10.1145/3453688.3461743
DO - 10.1145/3453688.3461743
M3 - Conference contribution
AN - SCOPUS:85109212605
T3 - Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
SP - 473
EP - 478
BT - GLSVLSI 2021 - Proceedings of the 2021 Great Lakes Symposium on VLSI
PB - Association for Computing Machinery
T2 - 31st Great Lakes Symposium on VLSI, GLSVLSI 2021
Y2 - 22 June 2021 through 25 June 2021
ER -