OWL: Cooperative thread array aware scheduling techniques for improving GPGPU performance

Adwait Jog, Onur Kayiran, Nachiappan Chidambaram Nachiappan, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Ravishankar Iyer, Chita R. Das

Research output: Chapter in Book/Report/Conference proceedingConference contribution

114 Scopus citations

Abstract

Emerging GPGPU architectures, along with programming models like CUDA and OpenCL, offer a cost-effective platform for many applications by providing high thread level parallelism at lower energy budgets. Unfortunately, for many general-purpose applications, available hardware resources of a GPGPU are not efficiently utilized, leading to lost opportunity in improving performance. A major cause of this is the inefficiency of current warp scheduling policies in tolerating long memory latencies. In this paper, we identify that the scheduling decisions made by such policies are agnostic to thread-block, or cooperative thread array (CTA), behavior, and as a result inefficient. We present a coordinated CTA-aware scheduling policy that utilizes four schemes to minimize the impact of long memory latencies. The first two schemes, CTA-aware two-level warp scheduling and locality aware warp scheduling, enhance per-core performance by effectively reducing cache contention and improving latency hiding capability. The third scheme, bank-level parallelism aware warp scheduling, improves overall GPGPU performance by enhancing DRAM bank-level parallelism. The fourth scheme employs opportunistic memory-side prefetching to further enhance performance by taking advantage of open DRAM rows. Evaluations on a 28-core GPGPU platform with highly memory-intensive applications indicate that our proposed mechanism can provide 33% average performance improvement compared to the commonly-employed round-robin warp scheduling policy.

Original languageEnglish (US)
Title of host publicationASPLOS 2013 - 18th International Conference on Architectural Support for Programming Languages and Operating Systems
Pages395-406
Number of pages12
DOIs
StatePublished - Apr 5 2013
Event18th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2013 - Houston, TX, United States
Duration: Mar 16 2013Mar 20 2013

Publication series

NameInternational Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS

Other

Other18th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2013
CountryUnited States
CityHouston, TX
Period3/16/133/20/13

All Science Journal Classification (ASJC) codes

  • Software
  • Information Systems
  • Hardware and Architecture

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    Jog, A., Kayiran, O., Nachiappan, N. C., Mishra, A. K., Kandemir, M. T., Mutlu, O., Iyer, R., & Das, C. R. (2013). OWL: Cooperative thread array aware scheduling techniques for improving GPGPU performance. In ASPLOS 2013 - 18th International Conference on Architectural Support for Programming Languages and Operating Systems (pp. 395-406). (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS). https://doi.org/10.1145/2451116.2451158