CIENKIE WARSLWY TLENKOWE DLA UKLADOW MOS VLSI.

Translated title of the contribution: Oxide Thin Films for MOS VLSI Circuits.

Andrzej Jakubowski, Jerzy Ruzyllo

Research output: Contribution to journalArticle

Abstract

Problems connected with the introduction of very thin oxide films in the technology of MOS-VLSI circuits are considered. Reasons are given for the reduction of dielectric thickness in order to improve parameters of MOS circuits. Effects causing degradation of parameters of devices with very thin dielectrics are discussed, along with limitations resulting from injection of hot carriers and density increase of defects causing breakdown of the oxide.

Original languagePolish
Pages (from-to)15-19
Number of pages5
JournalElektronika
Volume25
Issue number7
StatePublished - Dec 1 1984

Fingerprint

VLSI circuits
Oxide films
Thin films
Hot carriers
Degradation
Defects
Oxides
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Jakubowski, A., & Ruzyllo, J. (1984). CIENKIE WARSLWY TLENKOWE DLA UKLADOW MOS VLSI. Elektronika, 25(7), 15-19.
Jakubowski, Andrzej ; Ruzyllo, Jerzy. / CIENKIE WARSLWY TLENKOWE DLA UKLADOW MOS VLSI. In: Elektronika. 1984 ; Vol. 25, No. 7. pp. 15-19.
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Jakubowski, A & Ruzyllo, J 1984, 'CIENKIE WARSLWY TLENKOWE DLA UKLADOW MOS VLSI.', Elektronika, vol. 25, no. 7, pp. 15-19.

CIENKIE WARSLWY TLENKOWE DLA UKLADOW MOS VLSI. / Jakubowski, Andrzej; Ruzyllo, Jerzy.

In: Elektronika, Vol. 25, No. 7, 01.12.1984, p. 15-19.

Research output: Contribution to journalArticle

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Jakubowski A, Ruzyllo J. CIENKIE WARSLWY TLENKOWE DLA UKLADOW MOS VLSI. Elektronika. 1984 Dec 1;25(7):15-19.