Path planning on the TrueNorth neurosynaptic system

Kate D. Fischl, Kaitlin Fair, Wei Yu Tsai, Jack Sampson, Andreas Andreou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

We report on the implementation of a path planning algorithm on the TrueNorth neurosynaptic system. Our implementation exploits processing in the temporal domain within the architectural constraints of the TrueNorth chip to deduce the optimal path. The optimal path is computed on the TrueNorth chip for grid maps with dimensions as large as 173 χ 168 nodes consuming 70.0mW at an operating voltage of 0.8V.

Original languageEnglish (US)
Title of host publicationIEEE International Symposium on Circuits and Systems
Subtitle of host publicationFrom Dreams to Innovation, ISCAS 2017 - Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467368520
DOIs
StatePublished - Sep 25 2017
Event50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States
Duration: May 28 2017May 31 2017

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
CountryUnited States
CityBaltimore
Period5/28/175/31/17

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Fischl, K. D., Fair, K., Tsai, W. Y., Sampson, J., & Andreou, A. (2017). Path planning on the TrueNorth neurosynaptic system. In IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings [8050932] (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2017.8050932