Performance aware secure code partitioning

S. H.K. Narayanan, Mahmut Kandemir, H. Brooks

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Many embedded applications exist where decisions are made using sensitive information. A critical issue in such applications is to ensure that data is accessed only by authorized computing entities. In many scenarios, these entities do not rely on each other, yet they need to work on a secure application in parallel to complete application execution under the specified deadline. Our focus in this paper is on compiler-guided secure code partitioning among a set of hosts. The scenario targeted involves a set of hosts that want to execute a secure embedded application in parallel. The various hosts have different levels of access to the data structures manipulated in the application. Our approach partitions the application among the hosts such that the load imbalance across hosts is minimized to reduce execution time while ensuring that no security leak occurs.

Original languageEnglish (US)
Title of host publicationProceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007
Pages1122-1127
Number of pages6
DOIs
StatePublished - Sep 4 2007
Event2007 Design, Automation and Test in Europe Conference and Exhibition - Nice Acropolis, France
Duration: Apr 16 2007Apr 20 2007

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other2007 Design, Automation and Test in Europe Conference and Exhibition
CountryFrance
CityNice Acropolis
Period4/16/074/20/07

Fingerprint

Data structures

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Narayanan, S. H. K., Kandemir, M., & Brooks, H. (2007). Performance aware secure code partitioning. In Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007 (pp. 1122-1127). [4211955] (Proceedings -Design, Automation and Test in Europe, DATE). https://doi.org/10.1109/DATE.2007.364445
Narayanan, S. H.K. ; Kandemir, Mahmut ; Brooks, H. / Performance aware secure code partitioning. Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007. 2007. pp. 1122-1127 (Proceedings -Design, Automation and Test in Europe, DATE).
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Narayanan, SHK, Kandemir, M & Brooks, H 2007, Performance aware secure code partitioning. in Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007., 4211955, Proceedings -Design, Automation and Test in Europe, DATE, pp. 1122-1127, 2007 Design, Automation and Test in Europe Conference and Exhibition, Nice Acropolis, France, 4/16/07. https://doi.org/10.1109/DATE.2007.364445

Performance aware secure code partitioning. / Narayanan, S. H.K.; Kandemir, Mahmut; Brooks, H.

Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007. 2007. p. 1122-1127 4211955 (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Narayanan SHK, Kandemir M, Brooks H. Performance aware secure code partitioning. In Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007. 2007. p. 1122-1127. 4211955. (Proceedings -Design, Automation and Test in Europe, DATE). https://doi.org/10.1109/DATE.2007.364445