Phase-aware adaptive hardware selection for power-efficient scientific computations

Konrad Malkowski, Padma Raghavan, Mahmut Kandemir, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

Increased power consumption and heat dissipation have become the major limiters of available computational resources at many high performance computing (HPC) centers. Applications that run at suchcenters typically operate in single user mode, run for longperiods of time, and have long lasting application phases. Their users are interested in obtaining the maximum performance. We propose a phase aware adaptive hardware selection technique,featuring data prefetchers and dynamic voltage and frequency scaling. Ourtechnique takes advantage of memory bound phases in scientific codes, resulting in significant power (39%) and energy (37%) reductions while maintainingor exceeding the performance of an unoptimized system.

Original languageEnglish (US)
Title of host publicationISLPED'07
Subtitle of host publicationProceedings of the 2007 International Symposium on Low Power Electronics and Design
Pages403-406
Number of pages4
DOIs
StatePublished - Dec 17 2007
EventISLPED'07: 2007 International Symposium on Low Power Electronics and Design - Portland, OR, United States
Duration: Aug 27 2007Aug 29 2007

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

OtherISLPED'07: 2007 International Symposium on Low Power Electronics and Design
CountryUnited States
CityPortland, OR
Period8/27/078/29/07

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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