Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors

Joshua Dennis Booth, Jagadish Kotra, Hui Zhao, Mahmut Kandemir, Padma Raghavan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

The energy concerns of many-core processors are increasing with the number of cores. We provide a new method that reduces energy consumption of an application on many-core processors by identifying unique segments to apply dynamic voltage and frequency scaling (DVFS). Our method, phase-based voltage and frequency scaling (PVFS), hinges on the identification of phases, i.e., Segments of code with unique performance and power attributes, using hidden Markov Models. In particular, we demonstrate the use of this method to target hardware components on many-core processors such as Network-on-Chip (NoC). PVFS uses these phases to construct a static power schedule that uses DVFS to reduce energy with minimal performance penalty. This general scheme can be used with a variety of performance and power metrics to match the needs of the system and application. More importantly, the flexibility in the general scheme allows for targeting of the unique hardware components of future many-core processors. We provide an in-depth analysis of PVFS applied to five threaded benchmark applications, and demonstrate the advantage of using PVFS for 4 to 32 cores in a single socket. Empirical results of PVFS show a reduction of up to 10.1% of total energy while only impacting total time by at most 2.7% across all core counts. Furthermore, PVFS outperforms standard coarse-grain time-driven DVFS, while scaling better in terms of energy savings with increasing core counts.

Original languageEnglish (US)
Title of host publicationProceedings - 2015 IEEE 35th International Conference on Distributed Computing Systems, ICDCS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages185-195
Number of pages11
ISBN (Electronic)9781467372145
DOIs
StatePublished - Jul 22 2015
Event35th IEEE International Conference on Distributed Computing Systems, ICDCS 2015 - Columbus, United States
Duration: Jun 29 2015Jul 2 2015

Publication series

NameProceedings - International Conference on Distributed Computing Systems
Volume2015-July

Other

Other35th IEEE International Conference on Distributed Computing Systems, ICDCS 2015
CountryUnited States
CityColumbus
Period6/29/157/2/15

Fingerprint

Hidden Markov models
Electric potential
Hardware
Hinges
Voltage scaling
Dynamic frequency scaling
Energy conservation
Energy utilization

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Computer Networks and Communications

Cite this

Booth, J. D., Kotra, J., Zhao, H., Kandemir, M., & Raghavan, P. (2015). Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors. In Proceedings - 2015 IEEE 35th International Conference on Distributed Computing Systems, ICDCS 2015 (pp. 185-195). [7164905] (Proceedings - International Conference on Distributed Computing Systems; Vol. 2015-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICDCS.2015.27
Booth, Joshua Dennis ; Kotra, Jagadish ; Zhao, Hui ; Kandemir, Mahmut ; Raghavan, Padma. / Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors. Proceedings - 2015 IEEE 35th International Conference on Distributed Computing Systems, ICDCS 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 185-195 (Proceedings - International Conference on Distributed Computing Systems).
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abstract = "The energy concerns of many-core processors are increasing with the number of cores. We provide a new method that reduces energy consumption of an application on many-core processors by identifying unique segments to apply dynamic voltage and frequency scaling (DVFS). Our method, phase-based voltage and frequency scaling (PVFS), hinges on the identification of phases, i.e., Segments of code with unique performance and power attributes, using hidden Markov Models. In particular, we demonstrate the use of this method to target hardware components on many-core processors such as Network-on-Chip (NoC). PVFS uses these phases to construct a static power schedule that uses DVFS to reduce energy with minimal performance penalty. This general scheme can be used with a variety of performance and power metrics to match the needs of the system and application. More importantly, the flexibility in the general scheme allows for targeting of the unique hardware components of future many-core processors. We provide an in-depth analysis of PVFS applied to five threaded benchmark applications, and demonstrate the advantage of using PVFS for 4 to 32 cores in a single socket. Empirical results of PVFS show a reduction of up to 10.1{\%} of total energy while only impacting total time by at most 2.7{\%} across all core counts. Furthermore, PVFS outperforms standard coarse-grain time-driven DVFS, while scaling better in terms of energy savings with increasing core counts.",
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Booth, JD, Kotra, J, Zhao, H, Kandemir, M & Raghavan, P 2015, Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors. in Proceedings - 2015 IEEE 35th International Conference on Distributed Computing Systems, ICDCS 2015., 7164905, Proceedings - International Conference on Distributed Computing Systems, vol. 2015-July, Institute of Electrical and Electronics Engineers Inc., pp. 185-195, 35th IEEE International Conference on Distributed Computing Systems, ICDCS 2015, Columbus, United States, 6/29/15. https://doi.org/10.1109/ICDCS.2015.27

Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors. / Booth, Joshua Dennis; Kotra, Jagadish; Zhao, Hui; Kandemir, Mahmut; Raghavan, Padma.

Proceedings - 2015 IEEE 35th International Conference on Distributed Computing Systems, ICDCS 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 185-195 7164905 (Proceedings - International Conference on Distributed Computing Systems; Vol. 2015-July).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - The energy concerns of many-core processors are increasing with the number of cores. We provide a new method that reduces energy consumption of an application on many-core processors by identifying unique segments to apply dynamic voltage and frequency scaling (DVFS). Our method, phase-based voltage and frequency scaling (PVFS), hinges on the identification of phases, i.e., Segments of code with unique performance and power attributes, using hidden Markov Models. In particular, we demonstrate the use of this method to target hardware components on many-core processors such as Network-on-Chip (NoC). PVFS uses these phases to construct a static power schedule that uses DVFS to reduce energy with minimal performance penalty. This general scheme can be used with a variety of performance and power metrics to match the needs of the system and application. More importantly, the flexibility in the general scheme allows for targeting of the unique hardware components of future many-core processors. We provide an in-depth analysis of PVFS applied to five threaded benchmark applications, and demonstrate the advantage of using PVFS for 4 to 32 cores in a single socket. Empirical results of PVFS show a reduction of up to 10.1% of total energy while only impacting total time by at most 2.7% across all core counts. Furthermore, PVFS outperforms standard coarse-grain time-driven DVFS, while scaling better in terms of energy savings with increasing core counts.

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Booth JD, Kotra J, Zhao H, Kandemir M, Raghavan P. Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors. In Proceedings - 2015 IEEE 35th International Conference on Distributed Computing Systems, ICDCS 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 185-195. 7164905. (Proceedings - International Conference on Distributed Computing Systems). https://doi.org/10.1109/ICDCS.2015.27