Power analysis attack resistance engineering by dynamic voltage and frequency scaling

Shengqi Yang, Pallav Gupta, Marilyn Wolf, Dimitrios Serpanos, Vijaykrishnan Narayanan, Yuan Xie

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

This article proposes a novel approach to cryptosystem design to prevent power analysis attacks. Such attacks infer program behavior by continuously monitoring the power supply current going into the processor core. They form an important class of security attacks. Our approach is based on dynamic voltage and frequency scaling (DVFS), which hides processor state to make it harder for an attacker to gain access to a secure system. Three designs are studied to test the efficacy of the DVFS method against power analysis attacks. The advanced realization of our cryptosystem is presented which achieves enough high power and time trace entropies to block various kinds of power analysis attacks in the DES algorithm. We observed 27% energy reduction and 16% time overhead in these algorithms. Finally, DVFS hardness analysis is presented.

Original languageEnglish (US)
Article number2345774
JournalTransactions on Embedded Computing Systems
Volume11
Issue number3
DOIs
StatePublished - Sep 2012

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture

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