Power and performance comparison of crossbars and buses as on-chip interconnect structures

Yan Zhang, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

Traditionally, buses have been traditionally used as datapath interconnects because of their simplicity. Yet, as technology quickly scales down and the industry embraces systems-on-A-chip (SoC), the increasing global interconnect delay and chip power consumption become big concerns, and alternative datapath interconnect structures should be considered. This paper evaluates two datapath interconnection alternatives-full connection crossbars and multiple-input/output-port buses-At the transistor level and compares their power and delay performances. The results show that although a full connection crossbar consumes more energy per cycle and incurs larger delays than buses, crossbars consume less energy per data transfer when the number of input/output ports is small and the crossbar operates in full parallelism. This makes crossbars a good choice for connecting components and transferring parallel data in SoC designs.

Original languageEnglish (US)
Title of host publicationConference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers
EditorsMichael B. Matthews
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages378-383
Number of pages6
ISBN (Electronic)0780357000, 9780780357006
DOIs
StatePublished - Jan 1 1999
Event33rd Asilomar Conference on Signals, Systems, and Computers, ACSSC 1999 - Pacific Grove, United States
Duration: Oct 24 1999Oct 27 1999

Publication series

NameConference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers
Volume1

Other

Other33rd Asilomar Conference on Signals, Systems, and Computers, ACSSC 1999
CountryUnited States
CityPacific Grove
Period10/24/9910/27/99

All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Computer Networks and Communications

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    Zhang, Y., & Irwin, M. J. (1999). Power and performance comparison of crossbars and buses as on-chip interconnect structures. In M. B. Matthews (Ed.), Conference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers (pp. 378-383). [832356] (Conference Record of the 33rd Asilomar Conference on Signals, Systems, and Computers; Vol. 1). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ACSSC.1999.832356